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msp430 AES encryption/decryption using DMA

Other Parts Discussed in Thread: MSP430FR5969, MSP430FR5959

I'm having some difficulties implementing the AES encryption primitives for an msp430fr5969 micro controller following the indications described here:


www.ti.com.cn/.../slau367f.pdf


more particularly the AES CBC cipher mode:

www.ti.com.cn/.../slau367f.pdf


My current implementation looks like:

    int i = 8, j = 0;
    uint16_t *tmp;
    // key is given in 16-bit words
    uint16_t key[] = { 0x1234, 0x5678, 0x9ABC, 0xDEF0,
                       0xDEF1, 0xDEF2, 0xDEF3, 0xDEF4};
    uint16_t iv[]  = { 0x7545, 0xA546, 0x5461, 0x7526,
                       0xDCD1, 0x21A2, 0xD453, 0x216F};
    // AESOPx prepares the accelerator for encryption
    // Reset AES controller state o 0x0. AESACTL0 is
    // the control register
    AESACTL0 |= AESSWRST;
     // Prepare for encryption
     AESACTL0 |= AESCMEN;
     AESACTL0 &= ~AESOP0;
     AESACTL0 &= ~AESOP1;
    // Load the key
    while(i--)
        AESAKEY = (uint16_t)key[j++];
     // Wait for the AES accelerator to finish
    while(AESASTAT & AESBUSY);
    // Load initialization vector(needed for CBC)
    i = 8; j = 0;
    while(i--)
         AESAXIN = (uint16_t)iv[j++];
    // Wait for the AES accelerator to finish
     while(AESASTAT & AESBUSY);
    // Setup DMA as described in the manual
    // Channel selection. AES trigger 0 on channel 0 ------------------
     DMACTL0 = DMA0TSEL_11;
     // The AES accelerator makes use of level sensitive triggers
     DMA0CTL |= DMALEVEL;
    // Set transfer mode. For the AES accelerator it is always single transfer mode (DMADTx = 000)
     DMA0CTL |= DMADT_0;
     // Enable DMA
     //DMA0CTL |= DMAEN;
     // Source address
    DMA0SAL = (uint16_t)&AESADOUT;
    // Destination address. The cipher text is a byte array(char*)
     tmp = (uint16_t*)cipher_text;
     DMA0DAL = (uint16_t)tmp;
    // Size in words
    DMA0SZ = (uint16_t)number_of_blocks * 8;
      // Set increment value(2 bytes/ 1 word)
    // Increment source address
    DMA0CTL |= DMASRCINCR_3;
    // Increment destination address
    DMA0CTL |= DMADSTINCR_3;
    // Channel selection. AES trigger 1 on channel 1 ------------------
    DMACTL0 = DMA1TSEL_12;
    // The AES accelerator makes use of level sensitive triggers
    DMA1CTL |= DMALEVEL;
    // Set transfer mode. For the AES accelerator it is always single transfer mode (DMADTx = 000)
    DMA1CTL |= DMADT_0;
    // Enable DMA
    DMA1CTL |= DMAEN;
    // Source address
    // Destination address. The plain text is a byte array(char*)
    tmp = (uint16_t*)plain_text;
    DMA1DAL = (uint16_t)tmp;
    // Destination address
    DMA1DAL = (uint16_t)&AESAXDIN;
    // Size in words
    DMA1SZ = (uint16_t)n_blocks * 8;
    // Set increment value(2 bytes/ 1 word)
    // Increment source address
    DMA1CTL |= DMASRCINCR_3;
    // Increment destination address
    DMA1CTL |= DMADSTINCR_3;
    // According to the manual setting the number of blocks should trigger the
    // the encryption but it doesn't
    AESACTL1 &= ~AESBLKCNT0;
    AESACTL1 |= AESBLKCNT1;
    // Wait for the AES accelerator to finish
    while(AESASTAT & AESBUSY);
    // Wait for dma transfers to finish
    while (!(DMA0CTL & DMAIFG));
    while (!(DMA1CTL & DMAIFG));


Why isn't encryption triggered upon setting the number of blocks?


  • Hello,

    The register you are using AESAXIN according to the Family User Guide does not trigger the module. The AESADIN and AESAXDIN registers do. You can also trigger it with the AESDINWR Bit if AESCMEN = 0

    Regards,

    JH

  • Hi,

    I have got it running; however now I'm faced with another issue:
    "MSP430: Error connecting to the target: Security Fuse has been blown" and have opened a separate topic:
    e2e.ti.com/.../432608
  • hi
    can you tell me how did you solve this problem in details ?
    and can you have your code attached in this post?
  • msp432p401_aes_01.c
    /* --COPYRIGHT--,BSD_EX
     * Copyright (c) 2013, Texas Instruments Incorporated
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions
     * are met:
     *
     * *  Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     * *  Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the distribution.
     *
     * *  Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *******************************************************************************
     *
     *                       MSP432 CODE EXAMPLE DISCLAIMER
     *
     * MSP432 code examples are self-contained low-level programs that typically
     * demonstrate a single peripheral function or device feature in a highly
     * concise manner. For this the code may rely on the device's power-on default
     * register values and settings such as the clock configuration and care must
     * be taken when combining code from several examples to avoid potential side
     * effects. Also see http://www.ti.com/tool/mspdriverlib for an API functional
     * library & https://dev.ti.com/pinmux/ for a GUI approach to peripheral configuration.
     *
     * --/COPYRIGHT--*/
    //******************************************************************************
    //   MSP432P401 Demo - AES256 Encryption & Decryption
    //
    //  Description: This example shows a simple example of encryption and
    //  decryption using the AES256 module.
    //
    //                MSP432p401rpz
    //             -----------------
    //         /|\|                 |
    //          | |                 |
    //          --|RST              |
    //            |                 |
    //            |             P1.0|-->LED
    //
    //  Key: 000102030405060708090a0b0c0d0e0f101112131415161718191a1b1c1d1e1f
    //  Plaintext: 00112233445566778899aabbccddeeff
    //  Ciphertext: 8ea2b7ca516745bfeafc49904b496089
    //
    //   Dung Dang
    //   Texas Instruments Inc.
    //   Nov 2013
    //   Built with Code Composer Studio V6.0
    //******************************************************************************
    #include "msp.h"
    #include <stdint.h>
    
    uint8_t Data[16] =
    { 
      0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x99, 0xaa, 0xbb, 0xcc,
            0xdd, 0xee, 0xff
    };
    
    uint8_t CipherKey[32] =
    { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c,
            0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
            0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f };
    
    uint8_t DataAESencrypted[16];       // Encrypted data
    uint8_t DataAESdecrypted[16];       // Decrypted data
    
    
    int main(void) {
        volatile uint32_t i;
        uint16_t sCipherKey, tempVariable;
        WDTCTL = WDTPW | WDTHOLD;               // Stop WDT
    
        P1DIR |= BIT0;                          // P1.0 set as output
        P1OUT &= ~BIT0;                         // Turn off P1.0 LED
    
        
        AESACTL0  |= AESSWRST;
        /* Step 1: Load cipher key */
        
        
         AESACTL0  &= ~AESCM_M;              
         AESACTL0  &= ~AESOP_3;                     // Set AES module to encrypt mode
        
        /* Set AES key length to 256 bits */
        AESACTL0 = AESACTL0 & (~(AESKL_1 + AESKL_2))  | AESKL__256BIT ;
        
        //AESACTL0 |= AESCMEN;
        //AESACTL0 |= AESCM__CBC ;
        
    
        /* Load 256-bit cipher key to the AESAKEY register */
        for(i = 0; i < 256/8; i = i + 2)
        {
            /* Concatenate 2 8-bit blocks into one 16-bit block */
            sCipherKey =(uint16_t)(CipherKey[i]);
            sCipherKey = sCipherKey |((uint16_t)(CipherKey[i + 1]) << 8);
            /* Load 16-bit key block to AESAKEY register */
            AESAKEY = sCipherKey;
        }
    
        /* Wait until key is written */
        while((AESASTAT & AESKEYWR ) == 0);
    
        
        for(i=0;i<8;i++)
        {
          AESAXIN = 0x6666;
        }
         //while((AESASTAT & AESDINWR ) == 0); 
        /* Step 2: Encrypt data and store to DataAESencrypted */
    while((AESASTAT & AESKEYWR ) == 0);
    
        /* Load 128-bit block of data to encrypt to module */
        for(i = 0; i < 16; i = i + 2)
        {
            /* Concatenate 2 8-bit blocks into one 16-bit block */
            tempVariable =(uint16_t)(Data[i]);
            tempVariable = tempVariable |((uint16_t)(Data[i + 1]) << 8);
            /* Load 16-bit key block to AESADIn register */
            AESADIN = tempVariable;
        }
    
        /* Initiate encryption by setting AESKEYWR to 1 */
        AESASTAT |= AESKEYWR;
    
        /* Wait unit finished ~167 MCLK */
        while( AESASTAT & AESBUSY );
    
        /* Write 128-bit block of encrypted data back to DataAESencrypted */
        for(i = 0; i < 16; i = i + 2)
        {
            tempVariable = AESADOUT;
    
            DataAESencrypted[i] = (uint8_t)tempVariable;
            DataAESencrypted[i+1] = (uint8_t)(tempVariable >> 8);
        }
    
    
        /* Step 3: Reload AES key */
    
        /* Set AES module to decrypt mode */
        AESACTL0 |= AESOP_1;
    
    
        /* Set AES key length to 256 bits */
        AESACTL0 = AESACTL0 & (~(AESKL_1 + AESKL_2))  | AESKL__256BIT;
    
        /* Load 256-bit cipher key to the AESAKEY register */
        for(i = 0; i < 256/8; i = i + 2)
        {
            /* Concatenate 2 8-bit blocks into one 16-bit block */
            sCipherKey =(uint16_t)(CipherKey[i]);
            sCipherKey = sCipherKey |((uint16_t)(CipherKey[i + 1]) << 8);
            /* Load 16-bit key block to AESAKEY register */
            AESAKEY = sCipherKey;
        }
    
        /* Wait until key is written */
        while((AESASTAT & AESKEYWR ) == 0);
    
    
        /*Step 4: Decrypt data with keys that were generated during encryption
             * takes 214 MCLK.
             * This function will generate all round keys needed for decryption first
             * and then the encryption process starts */
    
        // Write 128-bit block of data to decrypt to module
        for (i = 0; i < 16; i = i + 2)
        {
            tempVariable = (uint16_t) (DataAESencrypted[i + 1] << 8);
            tempVariable = tempVariable | ((uint16_t) (DataAESencrypted[i]));
            AESADIN = tempVariable;
        }
    
    
        /* Wait until finished ~167 MCLK */
        while(AESASTAT & AESBUSY);
    
        /* Write 128-bit block of encrypted data back to DataAESdecrypted */
        for(i = 0; i < 16; i = i + 2)
        {
            tempVariable = AESADOUT;
            DataAESdecrypted[i] = (uint8_t)tempVariable;
            DataAESdecrypted[i+1] =(uint8_t)(tempVariable >> 8);
        }
    
        /* Step 4: Confirm decrypted data is identical to original data */
        for(i = 0; i < 16; i ++)
           if (DataAESdecrypted[i] != Data[i])
               while(1);                        // Set breakpoint here for error
    
        P1DIR |= BIT0;
        P1OUT |= BIT0;                          // Turn on P1.0 LED = success
        while(1);
    
    }
    
    

    hi 

    these days i  try to use AES module in msp432 ,

    i want to use CBC mode, bur after configuration,i does not excute in CBC mode。and can you tell me where am i wrong ?

  • why increment address AES registers? it is error. Set DMASRCINCR_0 for registers, DMASRCINCR_3 for array
  • Work version AES function in my project. 4 day from zero to work module. Tested decrypt/encrypt packet MSP430FR5959 <-> Daemon php service.

    Thanks to the community for tips. What is increase the speed?

    /****************************************************************************
    *	@Module		AES256
    *	@Version	1.0.00
    *	@Date		03.03.2016
    *	@Author		(c) Kolchanov Alexander - Soft.IT+
    *	@Descript	AES function MSP430FR encrypt/decrypt DMA mode EOB,CBC,OFB,CFB
    *	@Copyright	Copyright (c) 2016 (SOFT.iT+)
    ******************************************************************************/
    #include <msp430.h>
    #include "aes256.h"
    
    /* load key or IV to AES register
     * ac - AES registrer address, key - key to load
     */
    void loadKey(volatile unsigned int *ac, unsigned char *key) {
    	unsigned int i=AESBASE;			//i - length key in words (128, 192, 256 bit)
    	unsigned int *ptr=(unsigned int*)key;	//point to key
    	while(i--)*ac=*ptr++;
    	while(AESASTAT&AESBUSY);
    }
    
    /* Crypt/Decrypt AES Output Feedback (OFB) Mode (nofb on php mcrypt)
     * in - input buffer, out - output buffer, key - security key, iv - Initialization Vector
     * mode=0 - encrypt in -> out
     * mode=1 - decrypt in -> out
     * tested 8MHz enc - 0.008ms, dec - 0.008ms
     */
    void aesOFB(unsigned char mode, unsigned char *in, unsigned char *out, unsigned char *key, unsigned char *iv) {
    	AESACTL0=AESSWRST;							// reset AES, AESCMEN=0, AESOPx=00
    	AESACTL0=AESKL__128;							// set KEY length
    	// ------------------------------ AES OFB setup && generate key ---------------
    	AESACTL0|=AESCM1 | AESCMEN;						// AESCMEN=1, AESCMx=10
    	if(mode) AESACTL0|=AESOP0;						// AESOPx=01
    	loadKey(&AESAKEY,key);							// Load AES key
    	loadKey(&AESAXIN,iv);							// Load IV
    	DMACTL0=DMA0TSEL_11 | DMA1TSEL_12;					// Set DMA 0-1 triggers
    	DMACTL1=DMA2TSEL_13;							// Set DMA 2 triggers
    	DMA0CTL=DMADT_0 | DMALEVEL | DMASRCINCR_3 | DMADSTINCR_0;		// configure DMA 0
    	__data20_write_long((unsigned long)&DMA0SA, (unsigned long)in);		// Source address
    	__data20_write_long((unsigned long)&DMA0DA, (unsigned long)&AESAXIN);	// Destination address
    	DMA0SZ=PACKET_LEN>>1;							// Size packet in word
    	DMA0CTL|= DMAEN;							// Enable DMA 0
    	DMA1CTL=DMADT_0 | DMALEVEL | DMASRCINCR_0 | DMADSTINCR_3;		// configure DMA 1
    	__data20_write_long((unsigned long)&DMA1SA, (unsigned long)&AESADOUT);	// Source address
    	__data20_write_long((unsigned long)&DMA1DA, (unsigned long)out);	// Destination address
    	DMA1SZ=PACKET_LEN>>1;							// Size packet in word
    	DMA1CTL|= DMAEN;							// Enable DMA 1
    	DMA2CTL=DMADT_0 | DMALEVEL | DMASRCINCR_3 | DMADSTINCR_0;		// configure DMA 2
    	__data20_write_long((unsigned long)&DMA2SA, (unsigned long)in);		// Source address
    	__data20_write_long((unsigned long)&DMA2DA, (unsigned long)&AESAXDIN);	// Destination address
    	DMA2SZ=PACKET_LEN>>1;							// Size packet in word
    	DMA2CTL|= DMAEN;							// Enable DMA 2
    	AESACTL1=PACKET_LEN>>4; 						// start AES set AESBLKCNT size packet/128bit(8 byte)
    	AESASTAT|=AESDINWR;							// Trigger encryption/decryption
    	while(!(DMA1CTL & DMAIFG));						// wait end of AES on DMA 1
    }//----- end aesOFB
    
    /* Crypt/Decrypt AES Cipher Feedback (CFB) Mode (ncfb on php mcrypt)
     * in - input buffer, out - output buffer, key - security key, iv - Initialization Vector
     * mode=0 - encrypt in -> out
     * mode=1 - decrypt in -> out
     * tested 8MHz enc - 0.007ms, dec - 0.008ms
     */
    void aesCFB(unsigned char mode, unsigned char *in, unsigned char *out, unsigned char *key, unsigned char *iv) {
    	AESACTL0=AESSWRST;							// reset AES, AESCMEN=0, AESOPx=00
    	AESACTL0=AESKL__128;							// set KEY length
    	// ------------------------------ AES CFB setup && generate key ---------------
    	AESACTL0|=AESCM0 | AESCM1 | AESCMEN;					// AESCMEN=1, AESCMx=11
    	if(mode) AESACTL0|=AESOP0;						// AESOPx=01
    	loadKey(&AESAKEY,key);							// Load AES key
    	loadKey(&AESAXIN,iv);							// Load IV
    	DMACTL0=DMA0TSEL_11 | DMA1TSEL_12;					// Set DMA 0-1 triggers
    	if(mode) DMACTL1=DMA2TSEL_13;						// Set DMA 2 triggers
    	DMA0CTL=DMADT_0 | DMALEVEL | DMASRCINCR_3 | DMADSTINCR_0;		// configure DMA 0
    	__data20_write_long((unsigned long)&DMA0SA, (unsigned long)in);		// Source address
    	__data20_write_long((unsigned long)&DMA0DA, (unsigned long)&AESAXIN);	// Destination address
    	DMA0SZ=PACKET_LEN>>1;							// Size packet in word
    	DMA0CTL|= DMAEN;							// Enable DMA 0
    	DMA1CTL=DMADT_0 | DMALEVEL | DMASRCINCR_0 | DMADSTINCR_3;		// configure DMA 1
    	__data20_write_long((unsigned long)&DMA1SA, (unsigned long)&AESADOUT);	// Source address
    	__data20_write_long((unsigned long)&DMA1DA, (unsigned long)out);	// Destination address
    	DMA1SZ=PACKET_LEN>>1;							// Size packet in word
    	DMA1CTL|= DMAEN;							// Enable DMA 1
    	if(mode) {
    		DMA2CTL=DMADT_0 | DMALEVEL | DMASRCINCR_3 | DMADSTINCR_0;		// configure DMA 2 for decrypt
    		__data20_write_long((unsigned long)&DMA2SA, (unsigned long)in);		// Source address
    		__data20_write_long((unsigned long)&DMA2DA, (unsigned long)&AESADIN);	// Destination address
    		DMA2SZ=PACKET_LEN>>1;							// Size packet in word
    		DMA2CTL|= DMAEN;							// Enable DMA 2
    	}
    	AESACTL1=PACKET_LEN>>4; 						// start AES set AESBLKCNT size packet/128bit(8 byte)
    	AESASTAT|=AESDINWR;							// Trigger encryption/decryption
    	while(!(DMA1CTL & DMAIFG));						// wait end of AES on DMA 1
    }//----- end aesCFB
    
    /* Crypt/Decrypt AES Cipher Block Chaining (CBC) Mode
     * in - input buffer, out - output buffer, key - security key, iv - Initialization Vector
     * mode=0 - encrypt in -> out
     * mode=1 - decrypt in -> out
     * tested 8MHz enc - 0.0075ms, dec - 0.008ms
     */
    void aesCBC(unsigned char mode, unsigned char *in, unsigned char *out, unsigned char *key, unsigned char *iv) {
    	AESACTL0=AESSWRST;							// reset AES, AESCMEN=0, AESOPx=00
    	AESACTL0=AESKL__128;							// set KEY length
    	// ------------------------------ AES CBC generate key in decrypt mode -------
    	if(mode) {
    		AESACTL0|=AESOP1;							// AESOPx=10
    		loadKey(&AESAKEY,key);							// Load  AES key
    		AESACTL0|=AESOP0;							// AESOPx=11
    	}
    	AESACTL0|=AESCM0 | AESCMEN;						// AESCMEN=1, AESCMx=01
    	// ------------------------------ AES CBC generate key in crypt mode ---------
    	if(mode) {
    		AESASTAT|=AESKEYWR;
    	} else {
    		loadKey(&AESAKEY,key);							// Load AES key
    		loadKey(&AESAXIN,iv);							// Load IV
    	}
    	DMACTL0=DMA0TSEL_11 | DMA1TSEL_12;						// Set DMA 0-1 triggers
    	if(mode) DMACTL1=DMA2TSEL_13;							// Set DMA 2 triggers
    	DMA0CTL=DMADT_0 | DMALEVEL;							// configure DMA 0
    	if(mode) {
    		DMA0CTL|=DMASRCINCR_3 | DMADSTINCR_0;						// configure DMA 0
    		__data20_write_long((unsigned long)&DMA0SA, (unsigned long)iv);			// Source address
    		__data20_write_long((unsigned long)&DMA0DA, (unsigned long)&AESAXIN);		// Destination address
    	} else {
    		DMA0CTL|=DMASRCINCR_0 | DMADSTINCR_3;						// configure DMA 0
    		__data20_write_long((unsigned long)&DMA0SA, (unsigned long)&AESADOUT);		// Source address
    		__data20_write_long((unsigned long)&DMA0DA, (unsigned long)out);		// Destination address
    	}
    	DMA0SZ=mode?8:PACKET_LEN>>1;							// Size packet in word or 8 word
    	DMA0CTL|= DMAEN;								// Enable DMA 0
    	DMA1CTL=DMADT_0 | DMALEVEL;							// configure DMA 1
    	if(mode) {
    		DMA1CTL|=DMASRCINCR_0 | DMADSTINCR_3;						// configure DMA 1
    		__data20_write_long((unsigned long)&DMA1SA, (unsigned long)&AESADOUT);		// Source address
    		__data20_write_long((unsigned long)&DMA1DA, (unsigned long)out);		// Destination address
    	} else {
    		DMA1CTL|=DMASRCINCR_3 | DMADSTINCR_0;						// configure DMA 1
    		__data20_write_long((unsigned long)&DMA1SA, (unsigned long)in);			// Source address
    		__data20_write_long((unsigned long)&DMA1DA, (unsigned long)&AESAXDIN);		// Destination address
    	}
    	DMA1SZ=PACKET_LEN>>1;								// Size packet in word
    	DMA1CTL|= DMAEN;								// Enable DMA 1
    	if(mode) {
    		DMA2CTL=DMADT_0 | DMALEVEL | DMASRCINCR_3 | DMADSTINCR_0;			// configure DMA 2 for decrypt
    		__data20_write_long((unsigned long)&DMA2SA, (unsigned long)in);			// Source address
    		__data20_write_long((unsigned long)&DMA2DA, (unsigned long)&AESADIN);		// Destination address
    		DMA2SZ=PACKET_LEN>>1;								// Size packet in word
    		DMA2CTL|= DMAEN;								// Enable DMA 2
    	}
    	AESACTL1=PACKET_LEN>>4; 							// start AES set AESBLKCNT size packet/128bit(8 byte)
    	if(mode) {
    		while(!(DMA0CTL & DMAIFG));							// wait end of AES decrypt first block
    		DMA0CTL=DMADT_0 | DMALEVEL | DMASRCINCR_3 | DMADSTINCR_0;			// configure DMA 0
    		__data20_write_long((unsigned long)&DMA0SA, (unsigned long)in);			// Source address
    		__data20_write_long((unsigned long)&DMA0DA, (unsigned long)&AESAXIN);		// Destination address
    		DMA0SZ=PACKET_LEN/2-8;								// Size in word - Packet-8 word
    		DMA0CTL|=DMAEN;									// Enable DMA 0
    		while(!(DMA1CTL & DMAIFG));							// wait end of AES decrypt on DMA 1
    	} else {
    		while(!(DMA0CTL & DMAIFG));							// wait end of AES encrypt on DMA 0
    	}
    }//----- end aesCBC
    
    /* Crypt/Decrypt AES Electronic Codebook (ECB) Mode
     * in - input buffer, out - output buffer, key - security key
     * mode=0 - encrypt in -> out
     * mode=1 - decrypt in -> out
     * tested  8MHz enc - 0.0065ms, dec - 0.007ms
     */
    void aesECB(unsigned char mode, unsigned char *in, unsigned char *out, unsigned char *key) {
    	AESACTL0=AESSWRST;								// reset AES, AESCMEN=0, AESOPx=00
    	AESACTL0=AESKL__128;								// set KEY length
    	// ------------------------------ AES ECB generate key in decrypt mode -------
    	if(mode) {
    		AESACTL0|=AESOP1;								// AESOPx=10
    		loadKey(&AESAKEY,key);								// Load AES key
    		AESACTL0|=AESOP0;								// AESOPx=11
    	}
    	AESACTL0|=AESCMEN;								// AESCMEN=1, AESCMx=00
    	// ------------------------------ AES ECB generate key in crypt mode ---------
    	if(mode) AESASTAT|=AESKEYWR; else loadKey(&AESAKEY,key);
    	DMACTL0=DMA0TSEL_11 | DMA1TSEL_12;						// Set DMA 0-1 triggers
    	DMA0CTL=DMADT_0 | DMALEVEL | DMASRCINCR_0 | DMADSTINCR_3;			// configure DMA 0
    	__data20_write_long((unsigned long)&DMA0SA, (unsigned long)&AESADOUT);		// Source address
    	__data20_write_long((unsigned long)&DMA0DA, (unsigned long)out);		// Destination address
    	DMA0SZ=PACKET_LEN>>1;								// Size packet in word
    	DMA0CTL|= DMAEN;								// Enable DMA 0
    	DMA1CTL=DMADT_0 | DMALEVEL | DMASRCINCR_3 | DMADSTINCR_0;			// configure DMA 1
    	__data20_write_long((unsigned long)&DMA1SA, (unsigned long)in);			// Source address
    	__data20_write_long((unsigned long)&DMA1DA, (unsigned long)&AESADIN);		// Destination address
    	DMA1SZ=PACKET_LEN>>1;								// Size in packet word
    	DMA1CTL|= DMAEN;								// Enable DMA 1
    	AESACTL1=PACKET_LEN>>4; 							// start AES set AESBLKCNT size packet/128bit(8 byte)
    	while(!(DMA0CTL & DMAIFG));							// wait end of AES on DMA 0
    }//----- end aesECB
    

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