Other Parts Discussed in Thread: ENERGYTRACE
Hi,
im trying to make sense of the wake up figures in the datasheet. I measured around 23nC for wake up from LPM3 which is close to the figure below (but a bit confused about the extra FRAM wake up charge).
I have written other code to transfer bytes using the DMA, from one RAM location to another, from LPM3 using ALCK->TIMERB to trigger it. with no interrupts except pressing a button. Im using 8MHz for M/SMCLK.
i measured around 18nC to wake the DMA. but i thought it would be lower. Although, comparing LPM0 and LPM3 in table 1-2 (register bits) and table 5-10(wake up charges), the difference between them waking up is reconfiguring the DCO/MCLK. The commonality is waking the CPU. Therefore it seems like the DMA wake-up charge from LPM3 should be similar to QWAKE(LPM3) - QWAKE(LPM0), as the DMA has to wake/configure the DCO, request clock for the bus, but doesn’t wake the CPU.
Therefore the expected wake up charge is expected to be 25-3.8=21.2nC:
Expected QWAKE(DMA) ~ 21nC
have i understood that correctly?
Also, the wake up time based on table below for LPM3 (based on 3 cycles, as im ignoring the 2 cycles per transfer) would be 5.375us. the wake up time for LPM3->active at 8MHz is 6.85us.
5.375/6.85 * 23nC = 18nC which seems a strong clue as well.
I configured the PJ.x bits to output the SR bits. They dont change but i guess thats expected, the DMA onverules the bits to wake the DCO/MCLK clock as necessary? The users guide says SCG1/0 are device dependant, and SCG1 "for example" is DCO bias enable, and SCG0 "for example" is FLL enable. Would like to know for sure, but can't find anything in the datasheet.
DATASHEET FIGURES:
FRAM wake up = 16.5nC.
LPM0 wake up = 3.8nC
LPM3 wake up = 25nC
Measured figures (Measured the average current at different frequencies (A) then divided by frequency (1/s) to get charge per event (As)):
LPM3 wake up ~= 23nC
DMA wake up ~= 18nC (y intercept from below)
thanks.