CCS/MSP430F6736: Exporting data to excel

#include <msp430.h>
#include <stdio.h>
#include <time.h>

/* Array to store SD24_B conversion results */
unsigned int results[3];                          //SD24 converter result array
unsigned int ADC_Result[6];                      // 8-bit ADC conversion result array
float A0,A1,A2,A3,A4,A5,A6,A7,A8;                //analog voltage result registers
float I0,I1,I2,I3,I4,I5,I6,I7,I8;                //current result registers
unsigned int sig=0x0;
time_t current_time;
char *c_time_string;

int main(void)
{

    WDTCTL = WDTPW | WDTHOLD;               // Stop WDT

    // Setup P1.2 A0, 1.1 A1, 1.0 A2
       P1SEL |= BIT0 | BIT1 | BIT2;                  // Set P1.0,.1,.2 to non-IO
       P9SEL |= BIT1 | BIT2 | BIT3;                  //set P9.1,.2,.3 to non-IO

       P5DIR |= BIT0 | BIT1 | BIT2 | BIT3;




       __disable_interrupt();                        // Disable interrupts; Port Map cnfg
       PMAPKEYID = PMAPKEY;                          // Enable access Port Mapping regs
       P1MAP2 = PM_ANALOG;                           // Enable A0
       P1MAP1 = PM_ANALOG;                           // Enable A1
       P1MAP0 = PM_ANALOG;                           // Enable A2
       PMAPKEYID = 0;                                // Disable access Port Mapping regs
       __enable_interrupt();                         // Re-enable all interrupts


       // Setup ADC10
       ADC10CTL0 = ADC10SHT_3 | ADC10MSC | ADC10ON;  // 16 ADCclks, MSC, ADC ON
       ADC10CTL1 = ADC10SHP | ADC10CONSEQ_1;         // pulse sample mode, single sequence
       ADC10CTL2 |= ADC10RES;                       // 8-bit resolution
       ADC10MCTL0 = ADC10INCH_5;                     // A0,A1,A2(EoS), AVCC reference

       // Setup DMA0 (ADC10IFG trigger)
       DMACTL0 = DMA0TSEL_24;                        // ADC10IFG trigger
       DMA0SZ = 0x06;                                // 3 conversions
       __data16_write_addr((unsigned short) &DMA0SA, (unsigned long) & ADC10MEM0);
       // Source single address
       __data16_write_addr((unsigned short) &DMA0DA, (unsigned long) & ADC_Result[0]);
       // Destination array address
       DMA0CTL = DMADT_4 | DMADSTINCR_3 | DMAEN | DMAIE;
       DMA0CTL &= ~DMASRCBYTE;
       DMA0CTL &= ~DMADSTBYTE;
       // Repeated single transfer
       // Increment destination
       // Byte access
       // Enable int after seq of convs






    SD24BCTL0 |= SD24SSEL_1;      // Select internal REF
    SD24BCTL0 &= ~SD24REFS;       // Select SMCLK as SD24_B clock source

    SD24BCCTL0 &= ~SD24SNGL;
    //SD24BCCTL0 |= SD24ALGN;
    SD24BCCTL0 |= SD24DF0;
    SD24BCCTL0 |= SD24SCS_5;      // Single conversion, group 1

    SD24BCCTL1 &= ~SD24SNGL;
    //SD24BCCTL1 |= SD24ALGN;
    SD24BCCTL1 |= SD24DF0;
    SD24BCCTL1 |= SD24SCS_5;      // Single conversion, group 1

    SD24BCCTL2 &= ~SD24SNGL;
    //SD24BCCTL2 |= SD24ALGN;
    SD24BCCTL2 |= SD24DF0;
    SD24BCCTL2 |= SD24SCS_5;      // Single conversion, group 1

    SD24BIE |= SD24IE2; //| SD24IE1 | SD24IE0;                     // Enable channel 2 interrupt




    __delay_cycles(0x10000);                 // Delay for 1.5V REF startup

    while (1)
    {

        //time setup
        time_t t = time(NULL);
        struct tm *tm = localtime(&t);
        char s[64];
        strftime(s, sizeof(s), "%c", tm);


        while (ADC10CTL1 & ADC10BUSY) ;           // Wait if ADC10 core is active
        ADC10CTL0 |= ADC10ENC | ADC10SC;          // Sampling and conversion start

        __bis_SR_register(LPM0_bits | GIE); // Enter LPM0 w/ interrupts
        __delay_cycles(1000);                     // Delay between sequence convs
        __no_operation();                         // BREAKPOINT; View ADC_Result




        //ADC_10 voltage and current display
        A0=(ADC_Result[5]*3.3)/(1024*5);
        I0=(A0)/2.43;

        A1=(ADC_Result[4]*3.3)/(1024*5);
        I1=(A1)/2.43;

        A2=(ADC_Result[3]*3.3)/(1024*5);
        I2=(A2)/2.43;

        A3=(ADC_Result[2]*3.3)/(1024*5);
        I3=(A3)/2.43;

        A4=(ADC_Result[1]*3.3)/(1024*5);
        I4=(A4)/2.43;

        A5=(ADC_Result[0]*3.3)/(1024*5);
        I5=(A5)/2.43;


        printf("\n %s analog voltage A5= %f  \n",s,A5);
        printf("%s current I5= %f \n",s,I5);

        printf("\n %s analog voltage A4= %f \n",s,A4);
        printf("%s current I4= %f \n",s,I4);

        printf("\n %s analog voltage A3= %f \n",s,A3);
        printf("%s current I3= %f \n",s,I3);

        printf("\n %s analog voltage A2= %f \n",s,A2);
        printf("%s current I2= %f \n",s,I2);

        printf("\n %s analog voltage A1= %f \n",s,A1);
        printf("%s current I1= %f \n",s,I1);

        printf("\n %s analog voltage A0= %f \n",s,A0);
        printf("%s current I0= %f \n",s,I0);



        SD24BCTL1 |= SD24GRP1SC;            // Set bit to start conversion
        __bis_SR_register(LPM0_bits | GIE); // Enter LPM0 w/ interrupts

        SD24BCTL1 &= ~SD24GRP1SC;           // Clear bit for next conversion
        __no_operation();                   // SET BREAKPOINT HERE


        //SD24 converter voltage and current display
        A6=(results[0]*3.3)/(256*5);
        I6=(A6)/2.43;

        A7=(results[1]*3.3)/(5*256);
        I7=(A7)/2.43;

        A8=(results[2]*3.3)/(256*5);
        I8=(A8)/2.43;

        printf("\n %s analog voltage A6= %f \n",s,A6);
        printf("%s current I6= %f \n",s,I6);

        printf("\n %s analog voltage A7= %f \n",s,A7);
        printf("%s current I7= %f \n",s,I7);

        printf("\n %s analog voltage A8= %f \n",s,A8);
        printf("%s current I8= %f \n",s,I8);

        __delay_cycles(2000);

        if (sig==0x10)
        {
            sig = 0x00;
        }

        else
        {
            printf("select line chosen= %d",sig);
            P5OUT = sig;
            sig++;
        }


    }






}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=SD24B_VECTOR
__interrupt void SD24BISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(SD24B_VECTOR))) SD24BISR (void)
#else
#error Compiler not supported!
#endif
{
    switch (SD24BIV)
    {
        case SD24BIV_SD24OVIFG:             // SD24MEM Overflow
            break;
        case SD24BIV_SD24TRGIFG:            // SD24 Trigger IFG
            break;
        case SD24BIV_SD24IFG0:              // SD24MEM0 IFG
            break;
        case SD24BIV_SD24IFG1:              // SD24MEM1 IFG
            break;
        case SD24BIV_SD24IFG2:              // SD24MEM2 IFG
            results[0] = SD24BMEMH0;        // Save CH0 results (clears IFG)
            results[1] = SD24BMEMH1;        // Save CH1 results (clears IFG)
            results[2] = SD24BMEMH2;        // Save CH2 results (clears IFG)
            break;
    }

    __bic_SR_register_on_exit(LPM0_bits);   // Exit LPM0
}



#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=DMA_VECTOR
__interrupt void DMA0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(DMA_VECTOR))) DMA0_ISR (void)
#else
#error Compiler not supported!
#endif
{
    switch (__even_in_range(DMAIV, 16))
    {
        case DMAIV_NONE: break;                   // No interrupts
        case DMAIV_DMA0IFG:                       // DMA0IFG = DMA Channel 0
            // sequence of conversions complete
            __bic_SR_register_on_exit(LPM0_bits); // exit LPM0 on return
            break;
        case DMAIV_DMA1IFG: break;                // DMA1IFG = DMA Channel 1
        case DMAIV_DMA2IFG: break;                // DMA2IFG = DMA Channel 2
        case  8: break;                           // Reserved
        case 10: break;                           // Reserved
        case 12: break;                           // Reserved
        case 14: break;                           // Reserved
        case 16: break;                           // Reserved
        default: break;
    }
}