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  • TI Thinks Resolved

MSP430I2031: OFIFG bit gets set after clock initialization

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Replies: 14

Views: 484

Part Number: MSP430I2031

As soon as we call InitClock_g function, which just sets external resistor for clock, OFIFG bit gets set, if we clear it after that it remains clear.

 

/* --------------------------------------------------------------------- */

/*

Clock initialisation.

*/

void InitClock_g( void )

{

  CSCTL0 |= DCOR;            /* External Resistor for clocking */

}

cid:image001.png@01D52546.C4694770

  • Hi Ashish,

    Looking a the use case #3 on page 126 in the MSP430i2xx family users guide, what value of external resistor are you using?

    Dennis Lehman

  • In reply to Dennis Lehman:

    External resistor value : 20K

    Regards,

    Ashish

  • In reply to Ashish Kubal1:

    Hi Ashish,

    Based on your description,

    " OFIFG bit gets set, if we clear it after that it remains clear"

    This is the expected behavior as shown here:

    Or am I misunderstanding your question?

    Dennis Lehman

  • In reply to Dennis Lehman:

    Hi Ashish,

    I haven’t heard from you for a couple of days now, so I’m assuming you were able to resolve your issue.
    If this isn’t the case, please click the "This did NOT resolve my issue" button and reply to this thread with more information.
    If this thread locks, please click the "Ask a related question" button and in the new thread describe the current status of your issue and any additional details you may have to assist us in helping to solve your issues.

    Dennis Lehman

  • In reply to Dennis Lehman:

    Hi Lehman,

    Sorry for delayed reply.

    As shown in timing diagram at red encircled point ,weather OFIFG bit is automatically cleared by MSP or we need to clear it?

    In our code after setting clock ( CSCTL0 |= DCOR;  ) we are observing OFIFG bit even set after  1 sec.

    Regards,

    Ashish

  • In reply to Ashish Kubal1:

    Hi Ashish,

    Ok, this tells me there is a DCO failure.

    Are you setting the external resistor calibration value?

    After the 1 second, if you clear the OFIFG bit does it remain clear or stays set forever?

    Dennis Lehman

  • In reply to Dennis Lehman:

    Hi Dennis,

    Following is the low level init function which is called on startup (provided by TI). it loads values from TLV table if BORIFG bit is set. Is this ok?

    #ifdef __TI_COMPILER_VERSION__
    int _system_pre_init(void)
    #elif defined(__IAR_SYSTEMS_ICC__)
    int __low_level_init(void)
    #else
    #error Compiler not supported!
    #endif
    {
      unsigned int Temp;
      unsigned long *jtagPwd = (unsigned long *)JTAG_DIS_PWD1;
      /* Feed the watchdog timer */
      WDTCTL = WDTPW | WDTCNTCL;
      /* Check JTAG password locations and disable JTAG if passwords don't match.
       * Else the JTAG will be enabled in the 64th cycle after reset.
       */
      if ((*jtagPwd != 0x00000000u) && (*jtagPwd != 0xFFFFFFFFu))
      {
        /* Disable JTAG */
        SYSJTAGDIS = JTAGDISKEY;
      }
      /* Calibration section
       * Check for the BORIFG flag in IFG1. Execute calibration if this was a BORIFG.
       * Else skip calibration
       */
      Temp = (IFG1 & (unsigned int)BORIFG);
     
      if( Temp != 0u )
      {
       /* Perform 2's complement checksum on 62 bytes of TLV data */
        unsigned int checksum = 0u;
        unsigned char *TLV_address_for_parse = ((unsigned char *)TLV_START);
        unsigned int *TLV_address_for_checksum = ((unsigned int *)TLV_START + 1);
        tUI16 StartAdd = TLV_START + 1u;
        tUI16 EndAddr = TLV_END;
        tUI16 Addr = StartAdd;
        do
        {
          checksum ^= *TLV_address_for_checksum++;
          Addr++;
        } while( Addr <= EndAddr);
        checksum ^= 0xFFFFu;
        checksum++;
        /* If check sum is not correct go to LPM4 */
        if(*((unsigned int *)TLV_START) != checksum)
        {
          /* If CheckSum Failed Then Load Our Own Values */
          /* Calibration Values  */
          CSIRFCAL = 0x80u;
          CSIRTCAL = 0xC0u;
          CSERFCAL = 0x72u;
          CSERTCAL = 0x40u;
          SD24TRIM = 0x0Cu;
          REFCAL0  = 0x3Fu;
          REFCAL1  = 0x00u;
          /* DiogReg.InfoCallibFlag = 0x0001u;*/
          /*SetBit_g( &DiogReg.InfoCallibFlag, 0x01u );*/
        }
        else
        {
          /* Check sum matched, now set calibration values */
          /* Calibrate REF */
          REFCAL1 = *(TLV_address_for_parse + TLV_CAL_REFCAL1);
          REFCAL0 = *(TLV_address_for_parse + TLV_CAL_REFCAL0);
          /* Calibrate DCO */
          CSIRFCAL = *(TLV_address_for_parse + TLV_CAL_CSIRFCAL);
          CSIRTCAL = *(TLV_address_for_parse + TLV_CAL_CSIRTCAL);
          CSERFCAL = *(TLV_address_for_parse + TLV_CAL_CSERFCAL);
          CSERTCAL = *(TLV_address_for_parse + TLV_CAL_CSERTCAL);
          /* Calibrate SD24 */
          SD24TRIM = *(TLV_address_for_parse + TLV_CAL_SD24TRIM);
          /*DiogReg.InfoCallibFlag = 0x0000u;*/
          /*ClearBit_g( &DiogReg.InfoCallibFlag, 0x01u );*/
        }
          #pragma diag_suppress = Pm128 /* MISRA 10.1: */
          /* Clear BORIFG */
        IFG1 &= (tUI8)~(BORIFG);
      }
        /* Feed the watchdog timer */
      WDTCTL = WDTPW | WDTCNTCL;

      /* Return value:
       *  1 - Perform data segment initialization.
       *  0 - Skip data segment initialization.
       */
      return 1;
    }

    Regards,

    Ashish/Rakesh

  • In reply to Ashish Kubal1:

    Hi Ashish,

    I believe the example initialization code should work.

    What happens if you don't select the external resistor (ie. run on the internal resistor)?

    Dennis Lehman

  • In reply to Dennis Lehman:

    Hi Ashish,

    It has been a couple of days now and I was curious what you discovered using only the internal resistor?

    Dennis Lehman

  • In reply to Dennis Lehman:

    Hi Dennis,

    With internal resistor,  OFIFG bit doesn't get set.

    Regards,

    Ashish/Rakesh

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