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MSP430F2272: Clarification concerning BCL12

Part Number: MSP430F2272

In the MSP430F2272 errata there are 2 possible workaround alternatives described for the BCL12. In order to avoid the activation of BCL12:

1.)   Only one intermediate step is done when switching RSEL from <12 to >13 or vice versa.

2.)   RSEL is changed step by step (one by one).

 

Citation including 2.):

In the majority of cases switching directly to intermediate RSEL steps as described above will prevent the occurrence of BCL12. However, a more reliable method can be implemented by changing the RSEL bits step by step in order to guarantee safe function without any dead time of the DCO.

 

Question: Do both alternatives safely prevent the activation of BCL12, especially prevent the complete DCO stop?

This means: does also alternative 1.) safely prevent it? (The fix with alternative 1.) seems not to provide a necessary condition for activating BCL12 according to Description of BCL12 in the errata sheet)

Related to 1.

For switching RSEL from <12 to >13, at “Workaround” it is described that the intermediate step should be RSEL = 7 (default value).

Just to be sure, which of the following both switching procedures 1.a.) or 1.b.) should be preferred, starting with value of RSEL < 12 ?

 

1.a.)

According to the described workaround:

-       Set RSEL = 7

-       Set RSEL = 14 or 15

 

1.b.)

According to the described condition for activating BCL12 at “Description” – BCL12 might be activated when switching RSEL from < 12 to > 13:

-       Set RSEL = 13

-       Set RSEL = 14 or 15

 

Best regards,

Frank

 

  • I posted before about BCL12:

    https://e2e.ti.com/support/microcontrollers/msp430/f/166/t/726052?tisearch=e2e-sitesearch&keymatch=bcl12

    and consider it to still be unsettled as to what should be done as a workaround.  The problem is that you don't know whether the chips you're testing with are even prone to the problem.  If they aren't, nothing you do will cause a problem, but of course that doesn't mean other copies would work.  I'm just not sure the published workarounds are correct, but have no reports from anyone who has dealt with this on a large number of parts as to what does or doesn't work.

    In the end, I single-stepped from 13 to 14 to 15, and back down the same way, but always with DCOCTL set to zero before each transition.  Then once in the range, I didn't restrict changes to DCOCTL.  No range 7 stuff.  That seems to work, but of course doesn't match the official workaround at all.

  • *****************************************

    **** Question: Do both alternatives safely prevent the activation of BCL12, especially prevent the complete DCO stop?  *****

    ******************************************

    BCL12 is just one case for DCO hang-u. There are other cases for DCO stop. Please refer to errata sheet BCL13 and BCL16. 

    **************************************

    **** This means: does also alternative 1.) safely prevent it? (The fix with alternative 1.) seems not to provide a necessary condition for activating BCL12 *****according to Description of BCL12 in the errata sheet)

    **** Related to 1.

    **** For switching RSEL from <12 to >13, at “Workaround” it is described that the intermediate step should be RSEL = 7 (default value).

    **** Just to be sure, which of the following both switching procedures 1.a.) or 1.b.) should be preferred, starting with value of RSEL < 12 ?

    1.a.)

    According to the described workaround:

    -       Set RSEL = 7

    -       Set RSEL = 14 or 15

    1.b.)

    According to the described condition for activating BCL12 at “Description” – BCL12 might be activated when switching RSEL from < 12 to > 13:

    -       Set RSEL = 13

    -       Set RSEL = 14 or 15

    **************************************

    From the errata workaround recommendation, 1.a) is preferred. 

    Another option is changing the RSEL step by step. 

    Thanks, 

    Lixin 

  • Hi, FRZE and George, 

    For switching RSEL from <12 to >13, the better solution is to switch to 7 and then to 13 and last to 14 or 15.

    -       Set RSEL = 7

    -       Set RSEL = 13

    -       Set RSEL = 14 or 15

    The principle is to prevent the extreme frequency jump to cause the inrush current issues on the analog circuit of the DCO. From this point, the best way is to set RSEL step by step but we know it takes time. To follow the errata description for BCL12 workaround should work. 

    Hope this can answer your questions. 

    Thanks, 

    Lixin 

  • Thanks, Lixin, but my basic question is whether the workaround for BCL12 is even correct.  If you look at Robert Cowsill's original post on this:

    https://e2e.ti.com/support/microcontrollers/msp430/f/166/p/241213/847010

    you will see that the workaround did not prevent lockup on one of his chips, but doing the opposite did work.  The workaround essentially says that you should not change DCOCTL while you are in RSEL 15, but that you should first switch to RSEL 7, then change DCOCTL to your target setting, then switch back to RSEL 15 (presumably with a stop at RSEL 13 on the way).  Robert found that this did not work!!!  Instead, he cleared DCOCTL before switching to RSEL 15, then single-stepped DCOCTL from zero to his target setting while still in RSEL 15.  That did work.

    My own practice has been to do the same as Robert, and it has always worked fine.  But of course I don't know if any of the parts I've worked with are even prone to locking up.  My understanding is that BCL12 is only a problem for some MSP430 copies.

    Anyway, it seems to me that there is still considerable question whether the workaround works.  I understand what it says.  I'm just not convinced it's right.

  • Hi, George, 

    I reviewed the Robert Cowsill's post as you list above. I understood the concern. 

    Please note the BCL12 issue depends on process, voltage and temperature. So it may not occur on most of the silicons. For the specific G2452 unit, I think it is a corner case. Personally I agree with Robert on his final solution: 

    • Through experimentation I found a DCO configuration sequence that worked reliably. It starts by running a loop that decrements DCO+mod step-by-step until they reach zero, then increments RSEL to the target value step-by-step and finally increments DCO+mod step-by-step to the target value.

    It is not consistent with BCL12 workaround description. I will check with team internally, review again about BCL12 and whether the workaround needs to be updated. 

    Thanks, 

    Lixin 

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