Hello,
Can you please help me to answer the following questions below?
1. Does the FFT implemented in MSP430FR5994 require that the number of FFT points be a power of two? If not, does it automatically do zero-padding to make the number of samples submitted to the FFT algorithm to be a power of two?
2. Where can we find a good example code for the FFT implementation for this processor?
Thank you!
Jarrett,
1) According to the MSP430 DSPLibrary User's Guide, the "length" passed in to the fft parameter structure must be a power of 2.
2) A great example to showcase real-time FFT and FIR filtering done using LEA on the MSP430FR5994 is the Audio Filtering and Signal Processing TI Design (TIDM-FILTERING-SIGNALPROCESSING). Source code is provided for this TI Design so customers can step through the example and see first hand how to configure and use the DSP Library leveraging the Low Energy Accelerator.
Best regards,
Matt
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