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MSP430F2272: Expected ADC Noise (not gain or linearity from DS)

Part Number: MSP430F2272

MSP Friends & Family,

Our customer is asking the following:

We are using the ADC in the MCU for sampling at 20 Hz rate and the input bandwidth is 8 Hz. If the input is a clean, DC level (1.67 V) what is the expected noise? Will the output be a single ADC level or will it vary about a mean ADC level by many ADC counts? If so, by how much variation? The Reference voltage is 3.3V from a battery. FYI I am not interested in the gain or linearity – they’re in the data sheet already.

Comments welcomed.

TY,
CY

  • Hello Chris,

    Everything we provide in the datasheet regarding the ADC's noise is given in the identified Linearity Parameters table in the datasheet. These can be used to estimate the amount of noise you can expect from the ADC and how it impacts the dynamic range. Determining the amount of ADC counts of noise there will be for a given setup will have to be tested and measured by the customer.

    Best regards,

    Matt

  • You can refer to the following E2E thread for more information regarding ENOB on MSP430 ADCs: https://e2e.ti.com/support/microcontrollers/msp430/f/166/t/576917?MSP430F5437A-ADC-ENOB-or-SINAD

    Best regards,

    Matt

  • Thanks Matt, truly appreciate your replies.  I'll go ahead and discuss this with our customer to see if there is anything else that needs clarification.

    Regards,

    Chris

  • Hi Matt,

    We need further clarification on this question.  Let me clarify.

    The input signal is DC. The ENOB has no particular meaning in this case since the signal is not varying.

    Consider this example:

    Reference voltage: 3.3V (perfectly clean since it is derived from a battery)

    Input signal : 1.667 V (perfectly clean since it is derived from a battery)

    Conversion output (ideal case): 511 ADC counts (10-bit ADC)

    Excellent decoupling at necessary pins.

     

    Therefore, the question is:

    Does the ADC count vary from the ideal case of 511 over a short time?  For example : {t0, t1, t2, t3, t4, t5, t6, t7, t8, t9} -> { 501, 520, 490, 530, 498, 525, 480, 505, 522, 485} where the time between samples is 50 msec.

    This is just random noise inside the microcontroller and ADC.  We are not also interested in static errors due to linearity, offset and gain errors.

    My hunch tells me there will be some level ADC count variation even over a short time interval due to the general purpose ADC functionality (versus a high-performance ie and very expensive external analog to digital converter).  But even if true, I'm not sure how we would quantify this.  Either way, let me know your thoughts.

    TY,

    Chris

  • Matt - I'll add that we don’t see any such specification in the data sheet.  We see integral, differential linearity, gain and offset. For dynamic signals there is always a ENOB but the signal is DC.  Comments indeed welcomed.

    TY,
    Chris

  • Hi Chris,

    Please give me a couple of days to look into this and get back to you. Thank you for your patience.

    Best regards,

    Matt

  • Hi Matt,

    No problem at all.  Appreciate your help!

    Regards,

    Chris

  • Hi Chris,

    I am going to take this conversation offline for further support. Please go ahead and mark this as "Resolved" and I will continue providing support through email.

    Best regards,

    Matt

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