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MSP430F5338: 8-bit SPI in 4-pin Slave mode

Intellectual 2340 points

Replies: 1

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Part Number: MSP430F5338

In this case, using STE from Master as a chip select.

Hypothetically, what happens if STE goes active, we receive 1 bit then STE goes inactive. If this happens 8 time (let’s say over hours of time). On the 8th bit will we get a transfer from the RX shift register to the RX buff and then RX interrupt (if enabled)? Or does the fact that STE went inactive reset the shift register?

  • Hi Gregory,

    See section 37.3.4.1 of the users guide.  This indicates that when STE is inactive, the shift operation is halted, but does not indicate reset, until STE goes back to an active state, so it should trigger the RX interrupt once the 8th bit is received.  The more typical usage would be for the master to wait until all 8 bits are available and then send the whole byte at once only setting the STE line once.    

    https://www.ti.com/lit/ug/slau208q/slau208q.pdf

    Best Regards,

    Eddie

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