CCS/MSP430FR2433: I used LPM4 for low power mode but I got 17uA of current consumption and PWM and need the advice for switching between LPM4 and LPM3

Tool/software: Code Composer Studio

Hello, I use the MSP430FR2433 and I try to use LPM4 to save the power. However, I got 17uA of current consumption and clock should be disabled in LPM4 but I can see PWM at P1,1.

Could you comments for this issue? 

and is it possible to switch between LPM4 and LPM3?

I would like to use LPM4 to stay the low power mode and then HIGH signal that generated by comparator send to interrupt pin, LPM4 is changed to LPM3 to generate PWM at P1.1 but I couldn't figure out this.

it is really appreciate if anyone comment this!

Thank you.  

#include <msp430fr2433.h>

short prevADCValue;
short currADCValue;
short peakADCValue;
short ReferenceValue;

    int main(void)
    {
        WDTCTL = WDTPW + WDTHOLD;               // Stop watchdog timer
        PM5CTL0 &= ~LOCKLPM5;


         P1DIR = 0xFF;                             //Set direction of all P1 pins to output
         P2DIR = 0xFF;                             //Set direction of all P2 pins to output
         P3DIR = 0xFF;
         P1OUT = 0;                                //Set all P1 pins to low
         P2OUT = 0;
         P3OUT = 0;

          __bis_SR_register(SCG0);                          // disable FLL
         CSCTL3 |= SELREF__REFOCLK;                        // Set REFOCLK as FLL reference source
         CSCTL0 = 0;                                       // clear DCO and MOD registers
         CSCTL1 &= ~(DCORSEL_7);                           // Clear DCO frequency select bits first
         CSCTL1 |= DCORSEL_3;                              // Set DCOCLK = 8MHz
         CSCTL2 = FLLD_1 + 121;                            // FLLD = 1, DCODIV = 4MHz
         __delay_cycles(3);
         __bic_SR_register(SCG0);                          // enable FLL
         while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1));        // Poll until FLL is locked
         CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK;         // set ACLK = XT1 = 32768Hz, DCOCLK as MCLK and SMCLK source
         CSCTL5 |= DIVM1;                                // SMCLK = MCLK = DCODIV/2 = 1MHz, by default




    P1DIR |= BIT1;                     // P1.1
    P1SEL1 |= BIT1;                    // P1.1 options select
    TA0CCR0 = 320;
    TA0CCR1 = 85;
    TA0CCTL1 = OUTMOD_7;
    TA0CTL = TASSEL_1 | MC_1;        // ACLK
    TA0CCTL0 &= ~CCIE;


          __bis_SR_register(LPM4_bits + GIE); // LPM4 with interrupts enabled
    }