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Part Number: MSP430FR6820
1) Can you advise what is the lower limit for RAM voltage - i.e. what voltage causes that RAM is lost?
2) If we have SVSHE=1, device should reset at 1.75V-1.85V and all pins would be in high impedance, is it right?
Main reason for my questions is that we would protect RAM by SVS, but it doesn´t work. When we measure (oscilloscope) supply voltage, SVS works fine (the lowest voltage is about 1.78, then it resets), but some cells in RAM are damaged.
According to the datasheet, exceeding the upper and lower supply voltage specified limits may cause malfunction of the device including erroneous writes to RAM and FRAM. It also says that the minimum supply voltage is defined by the supervisor SVS levels. In your case, you're reducing voltage, so you'd need to check the VSVSH- values. The (worst case) max VSVSH- is 1.85 V for this device, so I interpret this to mean that RAM won't be corrupted if the supply voltage is kept above 1.85 V.
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In reply to James Evans:
thanks for your feedback. On page page 36 of the datasheet, there's a note "Exceeding the specified limits may cause malfunction of the device including erroneous writes to RAM and FRAM" - we thought that this is related with BOR.
So cannot we protect RAM and FRAM by SVS? We thought that SVS is there directly for that (On voltage drop, the MCU would have high impedance on its each pin).
In reply to Bart:
to provide further explanation - we have a battery powered device with a transciever. The transciever has about 25mA power consumption. At the end of life of battery, the voltage drop by Tx is increasing quickly.
We want to stop the transciever when having a voltage drop from 3V to 2V. There is SVS (supply voltage supervisor/monitor) in some other MSP430 devices (for instance f417) and this functionality would help us to solve this problem. Do you have any recommendations how to solve it with MSP430FR6820?
Now we are using ADC, but this is a very complicated solution.
BartSo cannot we protect RAM and FRAM by SVS? We thought that SVS is there directly for that (On voltage drop, the MCU would have high impedance on its each pin).
By "protect", do you mean back the RAM up to FRAM before power is lost completely? In some of our other devices, they feature the SVM monitor that could be used to trigger that backup. Unfortunately, this device doesn't feature SVM and when the SVS is hit, a BOR gets triggered which leaves no time to back up the RAM.
BartNow we are using ADC, but this is a very complicated solution.
Since this device doesn't have SVM, the ADC is a logical choice. How about using the ADC12_B's window comparator? Set it up to trigger an interrupt when the supply voltage crosses a threshold and then back up the RAM to FRAM.
Another option could be the COMP_E module. The reference module sourcing the COMP_E module should maintain a consistent output voltage even as the supply voltage drops.
Both of these options are discussed in Section 5.2 in the Intelligent System State Restoration After Power Failure With Compute Through Power Loss Utility app note.
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