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Part Number: MSP430F6777A
There is an explanation of users guide slau208q.pdf page 633 as below.
Which registers does this "LPM3.5 retention logic" affect? Do all of RTC_C registers are protected from write and reset? Or only for the RTC registers which are marked as "not retained"?
It should be marked as "retained" will be protected during into LPM3.5.
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In reply to Gary Gao:
Thank you for your answer.
So the back-grand of my question is following that as far as using LPM3.5, even if RTCLOCK bit is set to 1, RTC stops after POR/BOR because RTCHOLD bit is initialized to 1. If we do not want to stop RTC calendar, we need not to use LPM3.5.
In reply to Hisao Uchikoshi:
The RTCHOLD can be retained. The description of the table 24-2 is not very clear, it should be "not fully retained" for "not retained" items. You can see for "not retained" register RTCCTL1 some bits in the register is retained(You can see the note(1) The configuration of these bits is retained during LPMx.5 until LOCKLPM5 is cleared). So you should follow the detail description of each registers not based on the table 24-2
Now I fully understood. Thank you for your explanation.
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