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MSP430FR2476: SPI-B0 does not work

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Replies: 22

Views: 186

Part Number: MSP430FR2476

Hi everyone,

I'm using msp430fr2476. I need an example app for 3 wired spi slave for eUSCI-B0. TI provides example for A0 and it worked just fine, but when I tried to convert app from A0 to B0, it can not get data from master. The code I use for B0 can be seen below. I will be glad if you can help.

int main( void )
{
    WDTCTL = WDTPW|WDTHOLD;                   

    P1SEL0 |= BIT1 | BIT2 | BIT3;             
    //SYSCFG2|=USCIB0RMP;                       
    UCB0CTLW0 |= UCSWRST;                     
    UCB0CTLW0 |= UCSYNC|UCCKPL|UCMSB;         
                                              
    UCB0CTLW0 |= UCSSEL__SMCLK;                
    UCB0BR0 = 0x01;                           
    UCB0BR1 = 0;                              
    UCB0CTLW0 &= ~UCSWRST;                    
    UCB0IE |= UCRXIE;



    PM5CTL0 &= ~LOCKLPM5;                     
                                           


    __bis_SR_register(LPM0_bits | GIE);       


  return 0;
}


#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = USCI_B0_VECTOR;
__interrupt void USCI_B0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCI_B0_ISR (void)
#else
#error Compiler not supported!
#endif
{
    while (!(UCB0IFG&UCTXIFG));               
    UCB0TXBUF = UCB0RXBUF;

}

  • Hello Ege,

    which code example did you use for the A0 SPI?

    Best regards

    Peter

  • In reply to Peter Spevak:

    Hello Peter,

    I used this from TI examples. Source code name is "msp430fr267x_euscia0_spi_10.c", and here is the example code:

    /* --COPYRIGHT--,BSD_EX
     * Copyright (c) 2018, Texas Instruments Incorporated
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions
     * are met:
     *
     * *  Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     * *  Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the distribution.
     *
     * *  Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *******************************************************************************
     *
     *                       MSP430 CODE EXAMPLE DISCLAIMER
     *
     * MSP430 code examples are self-contained low-level programs that typically
     * demonstrate a single peripheral function or device feature in a highly
     * concise manner. For this the code may rely on the device's power-on default
     * register values and settings such as the clock configuration and care must
     * be taken when combining code from several examples to avoid potential side
     * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
     * for an API functional library-approach to peripheral configuration.
     *
     * --/COPYRIGHT--*/
    //******************************************************************************
    //  MSP430FR267x Demo - eUSCI_A0, SPI 3-Wire Slave Data Echo
    //
    //   Description: SPI slave talks to SPI master using 3-wire mode. Data received
    //   from master is echoed back.
    //   ACLK = 32.768kHz, MCLK = SMCLK = DCO ~ 1MHz
    //   Note: Ensure slave is powered up before master to prevent delays due to
    //   slave init.
    //
    //                MSP430FR2676
    //                 -----------------
    //             /|\|                 |
    //              | |                 |
    //              --|RST              |
    //                |                 |
    //                |             P5.2|<- Data IN (UCA0SIMO)
    //                |                 |
    //                |             P5.1|-> Data OUT(UCA0SOMI)
    //                |                 |
    //                |             P5.0|<- Serial Clock In (UCA0CLK)
    //
    //   Longyu Fang
    //   Texas Instruments Inc.
    //   August 2018
    //   Built with IAR Embedded Workbench v7.12.1 & Code Composer Studio v8.1.0
    //******************************************************************************
    #include <msp430.h>

    int main(void)
    {
        WDTCTL = WDTPW|WDTHOLD;                   // Stop watchdog timer

        P5SEL0 |= BIT0 | BIT1 | BIT2;             // set 3-SPI pin as second function
        SYSCFG3|=USCIA0RMP;                       //Set the remapping source
        UCA0CTLW0 |= UCSWRST;                     // **Put state machine in reset**
        UCA0CTLW0 |= UCSYNC|UCCKPL|UCMSB;         // 3-pin, 8-bit SPI slave
                                                  // Clock polarity high, MSB
        UCA0CTLW0 |= UCSSEL__ACLK;                // SMCLK
        UCA0BR0 = 0x01;                           // BRCLK = SMCLK/1
        UCA0BR1 = 0;                              //
        UCA0MCTLW = 0;                            // No modulation
        UCA0CTLW0 &= ~UCSWRST;                    // **Initialize USCI state machine**
        UCA0IE |= UCRXIE;                         // Enable USCI_A0 RX interrupt

        PM5CTL0 &= ~LOCKLPM5;                     // Disable the GPIO power-on default high-impedance mode
                                                  // to activate previously configured port settings

        __bis_SR_register(LPM0_bits | GIE);       // Enter LPM0, enable interrupts
    }

    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector=USCI_A0_VECTOR
    __interrupt void USCI_A0_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
        while (!(UCA0IFG&UCTXIFG));               // USCI_A0 TX buffer ready?
        UCA0TXBUF = UCA0RXBUF;                    // Echo received data
    }

  • In reply to Ege Ekici:

    Hello Ege,

    you're using the SMCLK instead of the ACLK in your code compared to the code example. Did you try the same clock source?

    Best regards

    Peter

  • In reply to Peter Spevak:

    Hello Peter,
    I used smclk with A0 and it works fine, I also tried with aclk for b0 by the way and it did not work.

    I have a clue for what could be the problem,  I used launchpad for msp430fr2476 (lp-msp430fr2476) and checked for spi-B1. There are two options for b1 pins, 4.3 - 4.4 - 5.3 or 3.6 - 3.2 - 3.5 pins can be used to for b1 spi. For BX_eUSCI SYSCFG2 register is used to select pin group, according to userguide.

    When I use pin group 3.2 - 3.5 - 3.6 and set USCIBORMP to 1, it works fine. The problem occurs when I use default pins (For b1 -> 4.3 - 4.4 - 5.3). Since these pins are default pins for b1, syscfg2 should not be set. And it does not work. B0 also use default pins by the way. 

    To sum up,  the problem seems to occurs when default pins (which does not require mapping) are used. Are default pins require different configurations?

    Note: I also tried to set syscfg2 to be sure but it does not work with default pins for b1.

    ////////////////Code for b1 with remaped pins (Worked):///////////////////

    int main(void)
    {
        WDTCTL = WDTPW|WDTHOLD;                   // Stop watchdog timer

        P3SEL0 |= BIT2 | BIT5 | BIT6;             // set 3-SPI pin as second function
        SYSCFG2|=USCIB1RMP;                       //Set the remapping source
        UCB1CTLW0 |= UCSWRST;                     // **Put state machine in reset**
        UCB1CTLW0 |= UCSYNC|UCCKPL|UCMSB;         // 3-pin, 8-bit SPI slave
                                                  // Clock polarity high, MSB
        UCB1CTLW0 |= UCSSEL__SMCLK;                // SMCLK
        UCB1BR0 = 0x01;                           // BRCLK = SMCLK/1
        UCB1BR1 = 0;                              //
        //UCB1MCTLW = 0;                            // No modulation
        UCB1CTLW0 &= ~UCSWRST;                    // **Initialize USCI state machine**
        UCB1IE |= UCRXIE;                         // Enable USCI_B1 RX interrupt

        PM5CTL0 &= ~LOCKLPM5;                     // Disable the GPIO power-on default high-impedance mode
                                                  // to activate previously configured port settings

        __bis_SR_register(LPM0_bits | GIE);       // Enter LPM0, enable interrupts
    }

    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector=USCI_B1_VECTOR
    __interrupt void USCI_B1_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_B1_VECTOR))) USCI_B1_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
        while (!(UCB1IFG&UCTXIFG));               // USCI_B1 TX buffer ready?
        UCB1TXBUF = UCB1RXBUF;                    // Echo received data
    }

    ////////////////Code for b1 with default pins (Failed):///////////////////

    int main(void)
    {
        WDTCTL = WDTPW|WDTHOLD;                   // Stop watchdog timer

        P4SEL0 |= BIT3 | BIT4;             // set 3-SPI pin as second function
        P5SEL0 |= BIT3;
        //SYSCFG2|=USCIB1RMP;                       //Set the remapping source
        UCB1CTLW0 |= UCSWRST;                     // **Put state machine in reset**
        UCB1CTLW0 |= UCSYNC|UCCKPL|UCMSB;         // 3-pin, 8-bit SPI slave
                                                  // Clock polarity high, MSB
        UCB1CTLW0 |= UCSSEL__SMCLK;                // SMCLK
        UCB1BR0 = 0x01;                           // BRCLK = SMCLK/1
        UCB1BR1 = 0;                              //
        //UCB1MCTLW = 0;                            // No modulation
        UCB1CTLW0 &= ~UCSWRST;                    // **Initialize USCI state machine**
        UCB1IE |= UCRXIE;                         // Enable USCI_B1 RX interrupt

        PM5CTL0 &= ~LOCKLPM5;                     // Disable the GPIO power-on default high-impedance mode
                                                  // to activate previously configured port settings

        __bis_SR_register(LPM0_bits | GIE);       // Enter LPM0, enable interrupts
    }

    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector=USCI_B1_VECTOR
    __interrupt void USCI_B1_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_B1_VECTOR))) USCI_B1_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
        while (!(UCB1IFG&UCTXIFG));               // USCI_B1 TX buffer ready?
        UCB1TXBUF = UCB1RXBUF;                    // Echo received data
    }

    Best Regards

    Ege

  • In reply to Ege Ekici:

    Hi Ege,

    many thanks for the additional information. This is strange. There are two relevant spots in the datasheet, to look for the required settings. One is the pins schematics Table 6-23. Port P1 (P1.0 to P1.7) Pin Functions and the other one is

    Table 6-11. eUSCI Pin Configurations (continued), which specifies, as you mentioned, whether you have to select the remapped or the default GPIO group for the respective functionality.

    The only difference I can see in the pin schematics/table between the default and mapped B0 GPIOs is the JTAG column in the table. Athough, there is no JTAG functionality assigned to the default B0 pins, could you please try to run the code without active debug connection? This means you have to disconnect it and power cycle the device after code download. Many thanks in advance.

    Best regards

    Peter

  • In reply to Peter Spevak:

    Hi Peter,

    Sorry for the late response. I tried as you mentioned. I load to program and then removed debug connection. I power the circuit with 3.3 v pin. it doesn't change the situation. It still works with remapped pins, and does not work with the defaults. By the way there are one more issue, remapped pins also work without remapping. I mean for b1 working pins also works without setting syscfg2 register. It looks like without checking syscfg2, it works for mapped pins. It seems like it stuck to mapping pins. Do I miss something for mapping (syscfg2 register) ? Should I set some other registers to use default pins ?  The code without mapping which should be mapped according to userguide can be seen below and it works. These are what I tried :

    1) SYSCFG2 = 0

    2)SYSCFG2 = 0    SYSCFG3 = 0

    3) SYSCFG2 = USCIB0RMP

    All three worked for the b1 pins below while default pins (b0) didn't work in any case:

    // wotking code for b1 with non-default pins

    int main(void)
    {
        WDTCTL = WDTPW|WDTHOLD;                   // Stop watchdog timer

        P3SEL0 |= BIT2 | BIT5 | BIT6;             // set 3-SPI pin as second function
        //SYSCFG2|=USCIB1RMP;
                                                  //Set the remapping source
        UCB1CTLW0 |= UCSWRST;                     // **Put state machine in reset**
        UCB1CTLW0 |= UCSYNC|UCCKPL|UCMSB;         // 3-pin, 8-bit SPI slave
                                                  // Clock polarity high, MSB
        UCB1CTLW0 |= UCSSEL__SMCLK;                // SMCLK
        UCB1BR0 = 0x01;                           // BRCLK = SMCLK/1
        UCB1BR1 = 0;                              //
        //UCB1MCTLW = 0;                            // No modulation
        UCB1CTLW0 &= ~UCSWRST;                    // **Initialize USCI state machine**
        UCB1IE |= UCRXIE;                         // Enable USCI_B1 RX interrupt
        P1OUT &= ~BIT0;                         // Clear P1.0 output latch for a defined power-on state
        P1DIR |= BIT0;
        PM5CTL0 &= ~LOCKLPM5;                     // Disable the GPIO power-on default high-impedance mode
                                                  // to activate previously configured port settings

        __bis_SR_register(LPM0_bits | GIE);       // Enter LPM0, enable interrupts
    }

    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector=USCI_B1_VECTOR
    __interrupt void USCI_B1_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_B1_VECTOR))) USCI_B1_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
        while (!(UCB1IFG&UCTXIFG));               // USCI_B1 TX buffer ready?
        UCB1TXBUF = UCB1RXBUF;                    // Echo received data
        P1OUT ^= BIT0;
    }
    */

    /// b0 code that does not work ////

    int main(void)
    {
        WDTCTL = WDTPW|WDTHOLD;                   // Stop watchdog timer

        P1SEL0 |= BIT1 | BIT2 | BIT3 ;             // set 3-SPI pin as second function

        //SYSCFG2|=USCIB0RMP;                       //Set the remapping source
        UCB0CTLW0 |= UCSWRST;                     // **Put state machine in reset**
        UCB0CTLW0 |= UCSYNC|UCCKPL|UCMSB;         // 3-pin, 8-bit SPI slave
                                                  // Clock polarity high, MSB
        UCB0CTLW0 |= UCSSEL__SMCLK;                // SMCLK
        UCB0BR0 = 0x01;                           // BRCLK = SMCLK/1
        UCB0BR1 = 0;                              //
        //UCB0MCTLW = 0;                            // No modulation
        UCB0CTLW0 &= ~UCSWRST;                    // **Initialize USCI state machine**
        UCB0IE |= UCRXIE;                         // Enable USCI_B0 RX interrupt
        P1OUT &= ~BIT0;                         // Clear P1.0 output latch for a defined power-on state
        P1DIR |= BIT0;
        PM5CTL0 &= ~LOCKLPM5;                     // Disable the GPIO power-on default high-impedance mode
                                                  // to activate previously configured port settings

        __bis_SR_register(LPM0_bits | GIE);       // Enter LPM0, enable interrupts
    }

    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector=USCI_B0_VECTOR
    __interrupt void USCI_B0_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCI_B0_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
        while (!(UCB0IFG&UCTXIFG));               // USCI_B0 TX buffer ready?
        UCB0TXBUF = UCB0RXBUF;
        P1OUT ^= BIT0;                              // Echo received data
    }

    Best Regards

    Ege

  • In reply to Ege Ekici:

    USCIB1RMP is in SYSCFG3 [Ref UG (SLAU445I) Table 1-32]

    P4.3/P4.4/P5.3 are the re-mapped pin-assignments for B1. [Ref DS (SLASEO7B) Table 6-11, but you have to squint a little bit]

    I put in a documentation error report for the data sheet a couple of months ago, but I guess nothing has happened yet.

    https://e2e.ti.com/support/microcontrollers/msp430/f/166/p/896525/3315191

  • In reply to Bruce McKenney47378:

    I use b1 since both groups are accessible. My main problem is spi-B0 with default pins, is it also use syscfg3 register.

  • In reply to Bruce McKenney47378:

    Thank you.I tried, it worked by the way for b1 but as I mentioned I need to use spi-b0 with p1.1 p1.2 p1.3 pins.

  • In reply to Ege Ekici:

    This is the b0 code spi 3wire slave code, and it does not works.


    int main(void)
    {
        WDTCTL = WDTPW|WDTHOLD;                   // Stop watchdog timer

        P1SEL0 |= BIT1 | BIT2 | BIT3;
        SYSCFG2|=USCIB0RMP;
                                                  //Set the remapping source
        UCB0CTLW0 |= UCSWRST;                     // **Put state machine in reset**
        UCB0CTLW0 |= UCSYNC|UCCKPL|UCMSB;         // 3-pin, 8-bit SPI slave
                                                  // Clock polarity high, MSB
        UCB0CTLW0 |= UCSSEL__SMCLK;                // SMCLK
        UCB0BR0 = 0x01;                           // BRCLK = SMCLK/1
        UCB0BR1 = 0;                              //
        //UCB0MCTLW = 0;                            // No modulation
        UCB0CTLW0 &= ~UCSWRST;                    // **Initialize USCI state machine**
        UCB0IE |= UCRXIE;                         // Enable USCI_B0 RX interrupt
        P1OUT &= ~BIT0;                         // Clear P1.0 output latch for a defined power-on state
        P1DIR |= BIT0;
        PM5CTL0 &= ~LOCKLPM5;                     // Disable the GPIO power-on default high-impedance mode
                                                  // to activate previously configured port settings

        __bis_SR_register(LPM0_bits | GIE);       // Enter LPM0, enable interrupts
    }

    #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
    #pragma vector=USCI_B0_VECTOR
    __interrupt void USCI_B0_ISR(void)
    #elif defined(__GNUC__)
    void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCI_B0_ISR (void)
    #else
    #error Compiler not supported!
    #endif
    {
        while (!(UCB0IFG&UCTXIFG));               // USCI_B0 TX buffer ready?
        UCB0TXBUF = UCB0RXBUF;                    // Echo received data
        P1OUT ^= BIT0;
    }

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