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MSP430FR4133: Drive XT1 -> ACLK -> UART?

Part Number: MSP430FR4133
Other Parts Discussed in Thread: MSP-EXP430FR4133, MSP-FET

Hello,

I am using CCS 10.1.0.00010  in Windows with MSP430FR4133 LaunchPad™ Development Kit (MSP-EXP430FR4133)

I am trying to drive the UART from clock derived from XT1.

    CS_turnOnXT1(CS_XT1_DRIVE_1);

    CS_initClockSignal(
        CS_ACLK,
        CS_XT1CLK_SELECT,
        CS_CLOCK_DIVIDER_1
        );

I have XT1 -> ACLK -> TimerA with period of 32767 and duty cycle 16383.
As expected, I see the LED flashing at once per second.

In the same program, the UART works as expected when driven from UCSSEL__SMCLK.
I haven't found a way to drive the UART with ACLK.  The choices are:

#define UCSSEL_0               (0x0000)       /* USCI 0 Clock Source: 0 */
#define UCSSEL_1               (0x0040)       /* USCI 0 Clock Source: 1 */
#define UCSSEL_2               (0x0080)       /* USCI 0 Clock Source: 2 */
#define UCSSEL_3               (0x00C0)       /* USCI 0 Clock Source: 3 */
#define UCSSEL__UCLK           (0x0000)       /* USCI 0 Clock Source: UCLK */
#define UCSSEL__MODCLK         (0x0040)       /* USCI 0 Clock Source: MODCLK */
#define UCSSEL__SMCLK          (0x0080)       /* USCI 0 Clock Source: SMCLK */

>>>>> How do I drive the UART directly from XT1 -> ACLK?

The underlying problem was the SMCLK/UART data was intermittent when running the code in CCS debug mode.
I was thinking that was really a problem with SMCLK in debug mode and thought XT1 would be a more stable source.

>>>>> Is there another way to fix intermittent SMCLK/UART data in debug mode?

I have an oscilloscope on the bench with board if that is helpful.

Thanks,
Dave

  • Hi Dave,

    Thanks for your detailed post. It's not uncommon that the speed varies during debugging mode most likely due to the JTAG control.

    CCS/MSP430G2553: Clock speed is different when debugging

    If you'd like to confirm your clock frequencies, I would recommend configuring the related pins to output the desired clock signals (rather than measuring it at the crystal with an oscilloscope probe), programming the device with those changes and power cycling the device. Then, use your oscilloscope to measure the clock frequencies at those pins. Don't use debug mode while doing that. If you're using the MSP-FET, it can power the device without being in debug mode.

    Getting the maximum speed out of MSP430G2553 16MHz

    Regards,

    James

  • Hi James,

    I will look into JTAG reply for the 2553.

    My questions are for the 4133.

    The first question is still pending for 4133.

    It has UART problem when running with or

    without debug:

    >>>>> How do I drive the UART directly from XT1 -> ACLK?

    Thanks,

    Dave

  • Based on data sheet (SLAS856B) Table 6-6 it looks like you can't use ACLK for USCI_A/B. I'm not sure why they removed this option, since it seems to me that MODCLK is not very useful for a communication port.

    You mentioned "intermittent" -- do you mean "stuttery" or random lost bytes? For the former: The backchannel UART shares the USB with the debugger, and the debugger gets priority, so to-host data tends to be bursty, with a maybe 1-2 second delay (it looked to me like a 64-byte buffering thing). I think the only way around this is to disconnect (software, not wires) the debugger. 

  • Hi Dave,

    Bruce is correct here that ACLK cannot be used as the clock source for the eUSCI_A0 or eUSCI_B0 modules. My earlier post was focusing on how you can confirm that your clock frequencies are correct.

    To rule out the back-channel UART, you can use a USB-to-TTL serial adapter configured for your baud rate. A logic analyzer would also help you capture the communication and let you analyze the baud rate as well as the time between bytes.

    Regards,

    James

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