Hi,
I am getting conflicting information on TI’s user guide and the examples provided for the RTC.
The example shows no majority sampling:
while (1)
{
__bis_SR_register(LPM3_bits + GIE); // Enter LPM3 w/ interrupt
__no_operation(); // Required for debugger
tx_char((RTCHOUR>>4)+0x30); // Send high nibble of hour
tx_char((RTCHOUR&0x0F)+0x30); // Send low nibble of hour
tx_char(':'); // Send ':'
tx_char((RTCMIN>>4)+0x30); // Send high nibble of minute
tx_char((RTCMIN&0x0F)+0x30); // Send low nibble of minute
tx_char('\n'); // Send new line
}
While the user guide clearly states that unpredictable results can occur when the counter clock is async to the CPU clock (as is the case in my instance).
Note: Accessing the Real-Time Clock registers
When the counter clock is asynchronous to the CPU clock, any read from any
counting register should occur while the counter is not operating. Otherwise,
the results may be unpredictable. Alternatively, the counter may be read
multiple times while operating, and a majority vote taken in software to
determine the correct reading.
Can someone please clarify? Should I be using a majority-vote scheme and if so, how many reads are required?
Thanks