According to the item <PMM20> description in the MSP430F5438A Device Erratasheet, it seems it should not configure the PMM to fast wakeup mode if LPM2/3/4 shall be entered and exited, because the Vcore could drop below the corresponding threshold and trigger POR or an interrupt.
But I am not sure about, if I disable the SVSL&SVML to configure the fast wakeup mode, the Vcore shall not be supervised and monitored, will the Vcore drop below the threshold and trigger the POR or an interrupt also if LPM2/3/4 shall be entered and exited?
In addition, I checked the example code from TI, it disables the SVSL&SVML to configure the fast wakeup mode and enter/exit into/from LPM3. It seems no need to worry about the POR/interrupt triggered when SVSL&SVML disabled. Please help to check my understanding, thanks!
