MSP430FR2355: Clock and timer

Do you need to generate all 3 clocks the same time or must the frequency be adjustable on a single output.

Finally you need to select the correct source clock for your timer and setup your PWM accordingly. Looks like your source clock is too slow or your selected timer intervals are too long.

Keep in mind if you Timer Source clock is faster the resolution of your frequency is better. What kind of accuracy requirements do you have?

hi,

I need to generate one clock at the same time. for example: 600khz.

I use timerB1 with interrupt. At the interrupt I toggle an output pin.

Source clock for timerB1 is SMCLK (24MHz by DCO).

I have defined the following registers of timerB1:

TB1CTL |=  TBCLR;

TB1CTL |= CNTL_0 | TBSSEL_SMCLK | ID_0 | MC_UP;

TB1EX0 = 0;

TB1CCR0 = 0x28; //(24MHz/600kHz = 40 = 0x28).

TB1CTL |=  TBIE;  //enable TB1

TB1CTL  &= ~TBIFG; //clear IRQ

I get about a maximum frequency output of 200-300khz.

Maybe the problem is that the CPU does not have enough clock cycles to get to the interrupt and to toggle the output pin. What do you think?

BR,

Mor.

I'm actually new to this MSP430.
Can you explain to me how it is possible to toggle  output pin without an interrupt?

Hi mor ge,

Assuming you are using SMCLK as the clock source for timerB, you will need to pick a fundamental frequency that you can divide with one of the TBCCRx count registers, lets say TBCCR1 for this example.  This is tricky considering 1/500kHz = 2us, 1/600kHz = 1.67us and 1/700kHz = 1.43us. 

For example, if you your SMCLK is 1MHz, then the smallest resolution is 1us.  This could generate the 500kHz, but not the others.

Fortunately, the FR2355 can operate up to 24Mhz which can provide more granularity for the timer.  So if you set the SMCLK to 24Mhz this would provide a timer resolution of 1/24Mhz or 41.67nS.  With the timer configured in the UP mode (timer counts from 0 up to = TB0CCR1) you could use the following TB0CCR1 values.

• 500kHz -> TB0CCR1 = 48
• 600kHz -> TB0CCR1 = 40
• 700kHz -> TB0CCR1 = 34

Attached is example which you can use to get the timer working.  If you want to switch frequencies on the fly you should be able to figure that out.

Hint: see section 14.2.4.2.1 in the users guide.

#include <msp430.h>

void initCS(void)
{
    FRCTL0 = FRCTLPW | NWAITS_2 ;

    P2SEL1 |= BIT6 | BIT7;                       // P2.6~P2.7: crystal pins
    do
    {
        CSCTL7 &= ~(XT1OFFG | DCOFFG);           // Clear XT1 and DCO fault flag
        SFRIFG1 &= ~OFIFG;
    } while (SFRIFG1 & OFIFG);                   // Test oscillator fault flag

    __bis_SR_register(SCG0);                     // disable FLL
    CSCTL3 |= SELREF__XT1CLK;                    // Set XT1 as FLL reference source
    CSCTL0 = 0;                                  // clear DCO and MOD registers
    CSCTL1 |= DCORSEL_7;                         // Set DCO = 24MHz
    CSCTL2 = FLLD_0 + 731;                       // DCOCLKDIV = 24MHz
    __delay_cycles(3);
    __bic_SR_register(SCG0);                     // enable FLL
    while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1));   // FLL locked

    CSCTL4 = SELMS__DCOCLKDIV | SELA__XT1CLK;   // set XT1 (~32768Hz) as ACLK source, ACLK = 32768Hz
                                                 // default DCOCLKDIV as MCLK and SMCLK source

}
#define FREQ_500K   48
#define FREQ_600K   40
#define FREQ_700K   34
#define FREQ        FREQ_600K
int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;                                   // Stop WDT

    initCS();

    P1DIR |= BIT6;
    P1SEL1 |=  BIT6;        // P1.6/TB0.1 output

    // Disable the GPIO power-on default high-impedance mode to activate
    // previously configured port settings
    PM5CTL0 &= ~LOCKLPM5;

    // Timer will toggle output independent of CPU
    TB0CCTL1 |= OUTMOD_7;
    TB0CCR0 = FREQ;
    TB0CCR1 = FREQ >> 1;
    TB0CTL = TBSSEL__SMCLK | MC__UP;             // SMCLK, UP mode

    // CPU enters while loop
    // can sleep all the time or do other tasks
    while(1)
    {
        __bis_SR_register(LPM0_bits);          // Enter LPM0 w/ interrupt
        __no_operation();                            // For debug

    }

}

#include <msp430.h>

void initCS(void)
{
    FRCTL0 = FRCTLPW | NWAITS_2 ;

    P2SEL1 |= BIT6 | BIT7;                       // P2.6~P2.7: crystal pins
    do
    {
        CSCTL7 &= ~(XT1OFFG | DCOFFG);           // Clear XT1 and DCO fault flag
        SFRIFG1 &= ~OFIFG;
    } while (SFRIFG1 & OFIFG);                   // Test oscillator fault flag

    __bis_SR_register(SCG0);                     // disable FLL
    CSCTL3 |= SELREF__XT1CLK;                    // Set XT1 as FLL reference source
    CSCTL0 = 0;                                  // clear DCO and MOD registers
    CSCTL1 |= DCORSEL_7;                         // Set DCO = 24MHz
    CSCTL2 = FLLD_0 + 731;                       // DCOCLKDIV = 24MHz
    __delay_cycles(3);
    __bic_SR_register(SCG0);                     // enable FLL
    while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1));   // FLL locked

    CSCTL4 = SELMS__DCOCLKDIV | SELA__XT1CLK;   // set XT1 (~32768Hz) as ACLK source, ACLK = 32768Hz
                                                 // default DCOCLKDIV as MCLK and SMCLK source

}
#define FREQ_500K   48
#define FREQ_600K   40
#define FREQ_700K   34
#define FREQ        FREQ_600K
int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;                                   // Stop WDT

    initCS();

    P1DIR |= BIT6;
    P1SEL1 |=  BIT6;        // P1.6/TB0.1 output

    // Disable the GPIO power-on default high-impedance mode to activate
    // previously configured port settings
    PM5CTL0 &= ~LOCKLPM5;

    // Timer will toggle output independent of CPU
    TB0CCTL1 |= OUTMOD_7;
    TB0CCR0 = FREQ;
    TB0CCR1 = FREQ >> 1;
    TB0CTL = TBSSEL__SMCLK | MC__UP;             // SMCLK, UP mode

    // CPU enters while loop
    // can sleep all the time or do other tasks
    while(1)
    {
        __bis_SR_register(LPM0_bits);          // Enter LPM0 w/ interrupt
        __no_operation();                            // For debug

    }

}

Hi Denis,

Thanks you for all the help.

After I tried to do what you wrote. I got the following comment:

MSP430: File Loader: Verification failed: Values at address 0x0BFB8 do not match Please verify target memory and memory map.

MSP430: GEL: c:\....out: a data verification error occurred, file load failed.

And now, I can't to load the software to MSP430.

can you help me?

BR,

Mor.

Hi mor ge,

Can you load a different program?

What tools are you using?