MSP430FR2433: DCO Stability issue

Hello,

g4ry said:

I am using the DCO without the FLL enabled, and I am seeing some odd behavior.

According to the user's guide, when the FLL operation is disabled, the DCO continues to operate at the current settings. Because it is not stabilized by the FLL, temperature and voltage variations influence the frequency of operation.

g4ry said:

When the DCO tap is held constant, I see discrete jumps in the output frequency.  On some parts, I have seen the discrete jump in frequency as high as 0.5%.  The output appears to jump back and forth between two discrete frequencies. This appears to happen randomly on a millisecond scale.  I would expect the DCO to drift over time, but I am puzzled by this behavior.

An accuracy of 0.5% doesn't seem bad compared to the min/max values for the FLL-enabled DCO at 16 MHz as shown in Table 5-5 in the datasheet.

g4ry said:

Note, the MOD is disabled, FTRIM, RSEL are both constant, and the CPU is in LMP0 sleep / not executing code.  The jumping in frequency seems to be directly related to hardware.  I have tested this at various constant values of DCO, FTRIM, and RSEL, across various devices.  The magnitude of of the instability seems to vary part-to-part.

The modulator would probably help smooth out these transitions.

g4ry said:

I would like to know if this is normal behavior, inherent to the DCO hardware used in this MCU, and if there is any way to quantify or predict how frequently and how far the DCO will jump between frequencies. (ie is there min/max/typical values associated with this behavior?).

Peter covered this pretty well in the following thread.

MSP430FR2433: DCO without FLL operation

g4ry said:

Any information appreciated.

I would highly recommend referencing the MSP430FR2xx and MSP430FR4xx DCO+FLL Application Guide.

Regards,

James

James Evans said:

g4ry said:

I am using the DCO without the FLL enabled, and I am seeing some odd behavior.

According to the user's guide, when the FLL operation is disabled, the DCO continues to operate at the current settings. Because it is not stabilized by the FLL, temperature and voltage variations influence the frequency of operation.

The issue is the same whether or not the FLL is enabled.  We have used the DCO on previous MSP chips extensively, and are very familiar with the temperature / voltage stability.  In our case where we don't use the FLL (normally), we implement a frequent software calibration based on a crystal, to keep the DCO pulled in over time.  I consider these type of operations a "macro" scale stability, whereas the issue that I'm having with the MSP430FR2433 DCO is more of a "micro" scale, perhaps better referred to as jitter.  What seems quite unique to this particular DCO behaviour is that that jitter is between 2 discrete frequencies, not a "drift" over time, per se.  This might just be inherent to the design of this particular DCO, although it's impossible to tell without knowing the internal archictecture of the DCO itself.

James Evans said:

g4ry said:

Note, the MOD is disabled, FTRIM, RSEL are both constant, and the CPU is in LMP0 sleep / not executing code.  The jumping in frequency seems to be directly related to hardware.  I have tested this at various constant values of DCO, FTRIM, and RSEL, across various devices.  The magnitude of of the instability seems to vary part-to-part.

The modulator would probably help smooth out these transitions.

I guess I should have noted, I tried every setting I could think of... enabling the modulator, enabling the FLL, running through the whole frequency range of the DCO with various RSEL, TRIM, MOD settings... in call cases, this jitter persists.

James Evans said:

g4ry said:

I would like to know if this is normal behavior, inherent to the DCO hardware used in this MCU, and if there is any way to quantify or predict how frequently and how far the DCO will jump between frequencies. (ie is there min/max/typical values associated with this behavior?).

Peter covered this pretty well in the following thread.

MSP430FR2433: DCO without FLL operation

I don't believe this thread is talking about the same thing as my issue.

James Evans said:

g4ry said:

Any information appreciated.

I would highly recommend referencing the MSP430FR2xx and MSP430FR4xx DCO+FLL Application Guide.

Thanks, I have referenced this guide several times throughout development, although unfortunately it doesn't have any information pertaining to this particular issue.

Thanks for your reply James.  I believe that the jitter issue that I'm seeing on these MCU's might just be inherent to the DCO design (we didn't see it on previous MSPs).  I was just hoping for some confirmation that it was normal behaviour (from someone familiar with the inner-workings of the DCO architecture), as we have been working for weeks trying to develop a screening method, in hopes of binning the best ones for our application.  (it appears at this point to be repeatable on specific ICs, and to vary quite a lot.)

Regards,

Gary

Hi Gary,

Thanks for your detailed reply. If you were seeing this only while using the FLL, then I would say you're observing the limits of the FLL accuracy. According to the datasheet, the DCO FLL accuracy is +/-0.5% when using XT1 crystal as the FLL clock source. But, you're seeing this with and without the FLL. So, the next logical accuracy spec in the datasheet for this scenario would probably be the Jittercc accuracy. That's given as a typical value of 0.25%, so you could be seeing the maximum value at 0.5%.

Regards,

James

Hi James,

I was interpreting the Jitercc spec from the datasheet to be the jitter introduced from cycle-to-cycle of the FLL, as it is only specified in Table 5-5 "characteristics of the FLL."  Is it possible for this jitter to exist even with the FLL disabled?

Thanks,

Gary