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MSP430FR5872: Data Sheet errata - Interrupts on 'all' ports

Part Number: MSP430FR5872

Data sheet SLASE66A (revised May 2015) for MSP430FR58xx and MSP430FR59xx parts  section 6.11.1 under Digital I/O specifies:

  • Any combination of input, output, and interrupt conditions is possible.

However, looking at the registers for the digital I/O ports (see section 6.13.1), I see that only ports 1-4 have the necessary registers for enabling interrupts on the pins (see for example table 6-48), and only ports 1-4 have interrupt vector registers (see table 6-3).

Can you confirm that only ports 1-4 have interrupt capabilities?

  • Hello Tim,

    Yes, only ports 1-4 on this device have interrupt capability. This is also stated in a statement below the one you pointed out.

    *Edge-selectable interrupt and LPM3.5 and LPM4.5 wakeup input capability is available for all pins of
    ports P1, P2, P3, and P4

    I agree this makes it unclear and will give this feedback for the datasheet team.
  • Hi Tim,

    What you're seeing is correct. Ports 1-4 are the only digital I/O with interrupt capabilities.

    When SLASE66A states "Any combination of input, output, and interrupt conditions is possible," this does not mean it's possible on all pins, only that some digital I/O allow this. A few bullet points down from this is further explanation of this point:

    "Edge-selectable interrupt and LPM3.5 and LPM4.5 wakeup input capability is available for all pins of
    ports P1, P2, P3, and P4."

    And as you correctly saw in the peripheral file map, other ports don't have the necessary registers to implement this feature. I apologize for any confusion this may have caused. Please don't hesitate to ask any further questions.

    Best regards,
    Caleb Overbay

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