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MSP430FR2310: PxIFG Register

Rejath Paul Varkey
Intellectual 420 points
Part Number: MSP430FR2310

From the user guide, I have noticed the register to be 8 bit.

My doubts are :

  1. Does setting each bit represent the interrupt action in the corresponding pin of the port ?
  2. If so, can only one bit be SET in the PxIFG register at a time ?
  3. Till a bit which was SET in PxIFG is cleared, won't interrupts in other pins in the same PORT be handled ?
  4. Will the state of P1IFG affect configuring P2IFG ?

  • 0
    Guru 88700 points
    1) Each IFG bit reflects activity on the pin. Only IFG bits with the corresponding IE bit set will trigger an interrupt.
    2) It is routine for multiple bits to be set in the IFG, but only the enabled (IE) ones matter. It's up to you to condition (REN, e.g.) the pins you're interested in so they only interrupt when you want them to.
    3) If you have multiple IE bits set, an interrupt will be triggered if any of the corresponding IFG bits are set. (Could be more than one.)
    4) P1IFG and P2IFG are independent.

    For the FR2310, be sure to check the data sheet about pin interrupts. On the first page, I see: "12 Interrupt Pins (8 Pins of P1 and 4 Pins of P2)", which means that some of the P2 pins can't generate interrupts.

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