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MSP430FR2310: Timer B0 delay in debug mode and Normal working mode Not the same.

Part Number: MSP430FR2310

We have a product that uses the timer function of MSP430FR2310, and the P1.6 pin uses the IO function to output high and low levels to generate a PWM signal. During our test, we found that we got 10KHZ, 10% signal when using CCS simulation debugging. However, after exiting the debug mode, in the normal working mode, it becomes a signal of 7.53KHZ, 10%. Will the clock frequency in debug mode be faster than in normal working mode? The program code is as follows.

int main(void)
{

WDTCTL = WDTPW | WDTHOLD; // Stop WDT
P1OUT &= ~BIT6;
// Configure GPIO
P1DIR |= BIT6;// | BIT2; // P1.6 output

__bis_SR_register(SCG0); // disable FLL
__delay_cycles(80);
CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source
__delay_cycles(80);
CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_3;// DCOFTRIM=3, DCO Range = 8MHz
CSCTL2 = FLLD_0 + 243; // DCODIV = 8MHz
__delay_cycles(800000); //100 ms delay for the power on;


for(ADC_Cnt = 0; ADC_Cnt < 16;ADC_Cnt++){
ADC_Buf[ADC_Cnt] = 60;
}
ADC_Cnt = 0;
ADC_Result_SUM = 400;

// Configure ADC A1 pin
P1SEL0 |= BIT4;
P1SEL1 |= BIT4;

// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;

// Configure ADC10
ADCCTL0 |= ADCSHT_0 | ADCON; // ADCON, S&H=16 ADC clks
ADCCTL1 |= ADCSHP | ADCDIV_4; // ADCCLK = MODOSC; sampling timer
ADCCTL2 |= ADCRES; // 10-bit conversion results
ADCIE |= ADCIE0; // Enable ADC conv complete interrupt
ADCMCTL0 |= ADCINCH_4 | ADCSREF_1; // A1 ADC input select; Vref=1.5V

// Configure reference
PMMCTL0_H = PMMPW_H; // Unlock the PMM registers
PMMCTL2 |= INTREFEN; // Enable internal reference
__delay_cycles(400); // Delay for reference settling

TB0CCTL0 |= CCIE; // TBCCR0 interrupt enabled
TB0CCR0 = 500;
TB0CTL |= TBSSEL__SMCLK | MC__CONTINUOUS; // SMCLK, continuous mode
PWMflag = 0;
__bis_SR_register(GIE); // Enter LPM3 w/ interrupts LPM0_bits |
__no_operation(); // For debug
while(1){
if(Readflag == 1){
ADC_Buf[ADC_Cnt] = ADC_Result;

ADC_Cnt++;
ADC_Cnt = ADC_Cnt & 0x0F;

ADC_Result_SUM = 0;
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[0];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[1];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[2];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[3];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[4];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[5];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[6];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[7];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[8];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[9];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[10];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[11];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[12];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[13];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[14];
ADC_Result_SUM = ADC_Result_SUM + ADC_Buf[15];

if(ADC_Result_SUM > THRESHOLD_H){
TB0CCTL0 &= ~CCIE; // TBCCR0 interrupt disabled
P1OUT &= ~BIT6;
}else if(ADC_Result_SUM < THRESHOLD_L){
TB0CCTL0 &= ~CCIE; // TBCCR0 interrupt disabled
P1OUT &= ~BIT6;
}
Readflag = 0;
}
}
}

// Timer B0 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = TIMER0_B0_VECTOR
__interrupt void Timer_B (void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(TIMER0_B0_VECTOR))) Timer_B (void)
#else
#error Compiler not supported!
#endif
{

if(PWMflag == 0){
P1OUT &= ~BIT6;
TB0CCR0 += LOW_TICKS; // Add Offset to TBCCR0
PWMflag = 1;
}else{
P1OUT |= BIT6;
ADCCTL0 |= ADCENC | ADCSC; // Sampling and conversion start
TB0CCR0 += HIGH_TICKS; // Add Offset to TBCCR0
PWMflag = 0;
}

}

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