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MSP430FR2433: MSP430FR2433 1-wire slave timer A0 not triggering ISR

Part Number: MSP430FR2433

Hi Team,

The customer is trying to create a 1-wire slave device from MSP430FR2433. Found this guide here.

They use the code from this tutorial, everything is perfectly described there, and it helped them figure out how 1-wire works. But got a problem when working with timer A0, it does not hit the interrupt and can never get into it.

Here is the timer initialization code

// TA1 will handle the early reset logic
TA1CCTL0 = CCIE; // TACCR1 interrupt enabled
TA1CTL = TASSEL__SMCLK | MC__STOP; // SMCLK, Stopped for now

// TA0 counts the pulse length on the communication line
// TA0 counts the pulse length on the communication line
TA0CCTL1 = CM_3 | CCIS_0 | SCS | CAP | CCIE;
// Capture rising / falling edges,
// Use CCI1A = P1.7 / TA0.1,
// Synchronous capture,
// Enable capture mode,
// Enable capture interrupt
TA0CCTL1 & = ~ COV; // Reset capture overflow
TA0CTL = TASSEL__SMCLK | MC__CONTINUOUS; // SMCLK, Continuous mode
TA0CTL | = TACLR; // Reset counter

Main function code

TA1CTL | = MC__UP | TACLR; // Timer A1 Up mode, reset counter
TA1CCR0 = 16000; // Load timer for pause value
timerOverflow = 0; // Reset timer overflow
__bis_SR_register (LPM0_bits | GIE);
TA1CTL & = ~ MC__UP; // Stop Timer A1
if (timerOverflow) // If timer overflow occurs, the next pulse should be a reset
{
TA0CTL & = ~ MC__CONTINUOUS; // Stop TA0, which uses SMCLK
P1SEL0 = 0x00; // Change P1.7 selection to GPIO
P1IFG = 0x00; // Reset P1 interrupt flags
P1IE = BIT7; // P1.7 interrupt enable
__bis_SR_register (LPM4_bits | GIE); // Safe to enter a more efficient LPM to save power
P1SEL0 = BIT7; // TA0.CCI1A peripheral selection
P1IE = 0x00; // Disable P1.7 interrupt
TA0CTL | = MC__CONTINUOUS | TACLR; // Reset timer counter
__bis_SR_register (LPM0_bits | GIE);
}


Interrupt handler code

// *********************************************** *****************************
// Timer0_A3 CC1-2, TA Interrupt Handler
// Measures the length of time that the master holds the one-wire line low
// *********************************************** *****************************
#if defined (__ TI_COMPILER_VERSION__) || defined (__ IAR_SYSTEMS_ICC__)
#pragma vector = TIMER0_A1_VECTOR
__interrupt void Timer0_A1_ISR (void)
#elif defined (__ GNUC__)
void __attribute__ ((interrupt (TIMER0_A1_VECTOR))) Timer0_A1_ISR (void)
#else
#error Compiler not supported!
#endif
{
switch (__even_in_range (TA0IV, TA0IV_TAIFG)) {
/ * switch (TA0IV) {* /
case TA0IV_NONE:
break; // No interrupt
case TA0IV_TACCR1:
if (! firstInterrupt) // If no first interrupt flag, action required
{
timerValue = TA0CCR1; // Record pulse length
__bic_SR_register_on_exit (LPM4_bits); // Exit LPM (0-4) to service pulse
firstInterrupt = 1;
}
else firstInterrupt = 0; // Reset flag after first interrupt
TA0CTL | = TACLR; // Reset timer counter
countInterrupts ++;
break;
case TA0IV_TACCR2:
break;
case TA0IV_TAIFG:
break;
default:
break;
}
}


Please let me know how to resolve this with the customer.

Thanks,

Jonathan

  • > P1SEL0 = BIT7; // TA0.CCI1A peripheral selection

    On the FR2433, TA0.1 (TA0.CCI1A) is on P1.1. not P1.7 [Ref data sheet (SLASE59D) Table 6-17]. Also you need to set P1SEL.1=10b, not 01b. Try:

    > P1SEL1 |= BIT1; // P1.1 as TA0.CCI1A peripheral selection per SLASE59D Table 6-17

    Also, since it's the same physical pin,

    >P1IE = BIT7; // P1.7 interrupt enable

    should be

    >P1IE |= BIT1; // P1.1 interrupt enable