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TMS570LC4357: SPI CS issue when configured as SPI Functional

Shivam Kakad
Prodigy 115 points
Part Number: TMS570LC4357

Hi Wang,

In our application for the TMS570LC4357 processor, we are interfacing the Serial Flash "S25FL256S" via SPI3 with the baud rate of 5MHz. In our system the clock configuration(in MHz) are : OSC = 20, PLL1 = 180, GCLK = 180, HCLK = 90 and VCLK1 = 90. The SPI is used in 4-Pin Mode i.e. SPI3CLK, SPI3SIMO, SPI3MISO & SPI3CS_0, and the SPI3 Pin configuration registers i.e. (PC0-PC8) are used only for configuring these 4 pins accordingly. Here, SPI3 is in Master Mode and the CSHOLD bit kept true.

When we are trying the communicate with the external serial flash, by configuring the SPI3CS_0 as functional and keeping the CSNR value as 0xFE, at the 5MHz rate we are not receiving the proper data configured, and every time it is getting read as 0xFF. We tried reducing the baud rate even we tried by configuring the different CSNR values such as 1,0xFF and 0xFD but still not able to establish the proper communication.

However, when we tried by configuring the SPI3CS_0 as GIO and then manually asserting/deasserting the chip selects before reading/writing the data (keeping the same configuration as mentioned in 1st paragraph), in that case, we are properly able to establish the communication with that external chip.

Thus, request you to help me in understanding, where exactly could it be going wrong whenever we are using the ChipSelect as SPI functional and how can I establish the communication using just the SPI as functional not as a GIO.

Regards,
Shivam

  • 0
    TI__Guru**** 186256 points

    Hi Shivam,

    Can you increase the Chip-Select-Active-to-Transmit-Start-Delay (C2TDELAY)? If the slave doesn't use the SPI enable signal, the master needs to wait for 6~7 VCLK cycles before sending the clock to begin the transaction. 

  • 0 in reply to QJ Wang
    Prodigy 115 points

    Hi Wang, thanks for the response.

    I tried configuring the C2TDELAY value from the SPIDELAY register as 07h and other different possible values, but still, I am receiving the data as 0xFF only. I am using Data Format 3 register and ensured that the DIS_CS_TIMERS field of the SPIFMT3 register is set to 0.

    Additional Information about the Data Format Register:

    WDELAY = 0, PARPOL= 0, PARITYENA = 0, WAITENA = 0, SHIFTDIR = 0, HDUPLEX_ENAx= 0, POLARITY = 0, PHASE = 0

    Request you to help me in resolving this issue.

  • 0 in reply to Shivam Kakad
    TI__Guru**** 186256 points

    Is the chip-select of S25FL256S active LOW? If CSDEF=0xFF (default, nCS=HIG when there is no transfer), the CSNR=0xFE will pll nCS to LOW when transferring data. Please double check if CSDEF=0xFF. Could you please probe nCS signal to see if it is pulled LOW?