Other Parts Discussed in Thread: INA240, REF2033, LM94022
ADC0 is configured 2MSPS (32Mhz) with 2x hardware averaging, ANIx channel TSHN 0x4 encoding, Rs=1.3Megohms (impedance) according to Tina, virtually no load.
Now the INA240 output we added 3Rk series and also isolated & filtered ANIx pin via 100R/200pf to ground. As the PWM duty cycle speeds up so does the INA240 output increase at ANIx input. Yet the scope widget output and digital decimal display of signal value do not follow all increases, often fall behind or roll near the same value depending on PWM duty cycle speed.
The sample amplitude measured from a steady state PWM duty cycle at one point matches well with external test equipment and diverges as the duty cycle increases up to a certain point. Yet at a much higher duty cycle the sample amplitude returns to an almost matching value in the scope widget peaks being sampled but the digital decimal value is a bit behind. Hence voids occur in the data even as the sample sequencer INT priority is lower than PWM generator that caused the sample start.
Even when the sequencer is being triggered via GPTM blanking one shot timer thus delaying start of sample PWM output created, the FIFO misses the boat entirely at times.
Why does the SAR ADC not keep up with high speed PWM duty cycle changes with PWMCLK (60Mhz), sampling at certain test points in the ANIx signal? It seems the PWM clock and the ADC0 clocks are meandering or phase shifting no matter how precise the sample timing or software filtering is made to handle INA240 samples. The same is true for LM94022 temperature sensors producing nearly the same behavior when ever the PWMENABLE register is enabled. The synchronized timing seems to get so wacked out it often disconnects USB0 device client in exact same behavior. The 25Hhz XTAL for MOSC has a large digital ground plane on the bottom of PCB directly under it. The concept aimed to isolate digital ground from analog by 1 ferrite bead drop, 50mohm resistance to bucking switchers analog ground. In that way the digital ground is a much cleaner signal also noted by the use of ADC internal VREFA+ (2v2 LDO) where a REF2033 was far to noisy.
