Other Parts Discussed in Thread: LM94022
The gremlins seem to get more active when potentials around the ADC channels are elevated above 24v. The very last channel scanned (AIN-16) for conversion appears to spit out perhaps VREFA+ potential onto channels sample hold frame.
Is there possibility datasheet left out conditions where a VREFA+ termination resistor may be required on AIN-CH16? Why does adding a termination resistor appear stop the LM94022 output random elevated current gain when it should not have any gain just because PWM0 is active? Seems the powers of the universe are on our side pointing out certain anomaly otherwise flew under the radar. Seem to recall long ago experimenting with Motorola ADC chip that required some value termination resistor on the last channel or a specific pin!
Given we sacrificed use of AIN-0 PE3 for conditions errata #13 silicon Rev.3, may also have similar origins we are currently having relative to AIN-CH16?
Is it not odd that the very last ADC channel is having elevated issues when PWM0 is mostly active, yet with a relative turtle slow 80us period?