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Original question:

TM4C1294NCPDT: AIN-16 unrelated switching noise

TM4C1294NCPDT: AIN-16 unrelated switching noise

Genatco
Guru 54077 points
Part Number: TM4C1294NCPDT
Other Parts Discussed in Thread: LM94022

Did not add in post AIN-16 is the last (configured) analog input but there are three more (AIN-17,18,19) on the end (PK1,2,3) respectively that will later be populated LM94022 and an analog control pot. So for now (PK1,2,3) circuit traces are disconnected via 0R near MCU pin or exist within 1/2" from MCU input.

Oddly AIN-16 (PK0) is on same GPIO port as M1/2Fault inputs (PK6, PK7) configured IN direction WPU. Those PCB traces direct couple to analog comparator outputs Co1,Co2 (PD1, PD2) more recently configured for OD direction. That seems to be another possible link to why the new LM94022 is behaving differently than the partially shorted output one. Saying shorted but in reality is 2.9k resistance to ground pin considered a short?

TI-Tina analysis plots of any analog comparator output switching noise may not be enough to trip MnFault inputs. Yet is it plausible switching noise is cross talking inside GPIO port K? and spilling onto AIN-16? Why is this scenario even occurring a more puzzling question but seemingly links to analog comparator being suspect.

  • 0
    Guru 54077 points
    Reconfigured analog comparator outputs HW direction PD1,2 made no difference to stop switching noise on AIN-16 (PK0). Yet suspect that is were PWM is inflicting AIN-16 (PK0).

    We now have 10uh chokes versus 0.15 ohm ferrite series +3v3 into VREF+ feed of C0+ adjust pot input on GPIO PC6 feeding threshold of VREF analog comparator block.
  • 0 in reply to Genatco
    Guru 54077 points
    Above made no difference for AIN-16 though removing 0.2n cap and put 3R9k to ground near AIN-16 output stopped LM94022 output value from increasing with PWM0 generators output PWM A/B signals. Going to do the same for AIN-8 and report any improvement or failure here.

    This workaround is not mentioned in the LM942022 datasheet.
  • 0
    TI__Guru**** 159235 points
    Hi BP101,

    You are speculating a lot of things that I cannot confirm. I don't really have a good answer for you. In silicon design, one thing that is done before tapeout is crosstalk analysis. Therefore, I tend not to think there is a crosstalk coupling from the aggressor PK6/7 onto the victim PK0 within the device. In addition, the ADC is sensitive to noise. Precaution is normally taken early in the design cycle such that the critical wires are routed (sometime hand routed) in the required width to avoid criss-crossing with high frequency digital signals. With all that said, I agree with you that a lot of the phenomenons you are seeing will depend on the system level on which components interact with each other. Can you tie the PK6/7 to VDD instead of relying on the internal WPU. Do you have stable VDD/VDDA and GND supply to the side of the chip where PK0/6/7 are located?
  • 0 in reply to Charles Tsai
    Guru 54077 points

    Hi Charles,

    Charles Tsai said:
    Precaution is normally taken early in the design cycle such that the critical wires are routed (sometime hand routed) in the required width to avoid cross-crossing with high frequency digital signals

    That was taken into consideration and specifically avoided around all four LM94022 sensors. Yet removing the 0.2n/1n charge cap/s instead placed 3R9k to ground stopped 1st steps sample value from increasing when PWM was active. We did the same for the other sensor also undocumented relative info of our work around though the output can source/sink 7ma. Fear was an input divider may change the analog voltage of the calibrated sensor. Ideally the ground resistor (3R9k) sets the divided voltage above any of the sensor values and wont affect the readings. The cADC switching noise AIN-16 is no longer effecting TSNH step 1 and it was very low level noise below 200mv yet effected the samples.

    Oddly the sequencer step may have more to do with switching noise than originally thought. The 1st step would appear to lose TSNH and start drifting but the 2n'd step was always stable during acquisition. We did captured switching spikes coming out of AIN-16 for some reason AIN-16 was spitting spikes onto the channel, perhaps as it lost hold acquisition on the 1st step? Increasing all steps TSNH encoded value could not resolve the issue alone.

  • 0 in reply to Genatco
    Guru 54077 points
    The LM94022 datasheet shows a connection to SAR ADC and suggested adding 1nf cap for output noise suppression. Not a word about adding output resistor to ground or how it may affect sensors calibration. Have concluded many of TI chip datasheet analysis do minimal testing in non-typical real world conditions. Perhaps that comes from acquisitions of other companies not being held to the same level of quality as components designed directly by TI.