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CCS/TM4C1294NCPDT: TM4C1294 ram extension with external RAM

Intellectual 320 points

Replies: 3

Views: 130

art Number: TM4C1294NCPDT

Tool/software: Code Composer Studio

Hi,

I'm using the TM4C1294 microcontroller for my IoT application. I'm been facing some issues with ram usage and planned to go for a external ram for more ram available.

I've been reading the following example ti.com/tool/TIDM-TM4C129XSDRAM and it seems pretty straight-foward the hardware requirements, but I still have some question about the firmware development using the external RAM.

My question is more into the linker and how to treat my code using both external and internal RAM. On the example before, the author used the following line to make sure he was accessing the external RAM:

g_pui16EPISdram = (uint16_t *)0x60000000;

His linker was also the default, so I'm assuming when allocating variables on my code, such variables would never use the external RAM, right?

#define APP_BASE 0x00000000
#define RAM_BASE 0x20000000

/* System memory map */

MEMORY
{
    /* Application stored in and executes from internal flash */
    FLASH (RX) : origin = APP_BASE, length = 0x00100000
    /* Application uses internal RAM for data */
    SRAM (RWX) : origin = 0x20000000, length = 0x00040000
}

/* Section allocation in memory */

SECTIONS
{
    .intvecs:   > APP_BASE
    .text   :   > FLASH
    .const  :   > FLASH
    .cinit  :   > FLASH
    .pinit  :   > FLASH
    .init_array : > FLASH

    .vtable :   > RAM_BASE
    .data   :   > SRAM
    .bss    :   > SRAM
    .sysmem :   > SRAM
    .stack  :   > SRAM
}

__STACK_TOP = __stack + 256;

So, my question is: is it possible to use the external and internal RAM as one linear memory bank? Can I program just as if I had using my internal RAM? What modifications to the example would be required to do such?

I intend to use this with TI-RTOS, does this change the answer or still the same?

  • Hi,
    If you meant to ask for the internal RAM and the external RAM in one contiguous memory map then it is not possible. By design the external memory will be mapped to 0x60000000 while the internal RAM is mapped to starting at 0x20000000. From the CPU memory map point of view there is a gap in between. Once the EPI (External Peripheral Interface) module is properly configured you can access the external memory at 0x6000000 as if reading/writing to the internal memory. Below is a snippet of code. For the full example, please refer to the sdram.c example in <TivaWare_Installation>/examples/peripherals/epi/sdram.c.


    //*****************************************************************************
    //
    // The starting and ending address for the 64MB SDRAM chip (32Meg x 16bits) on
    // the SDRAM daughter board.
    //
    //*****************************************************************************
    #define SDRAM_START_ADDRESS 0x00000000
    #define SDRAM_END_ADDRESS 0x01FFFFFF

    //
    // Set the EPI memory pointer to the base of EPI memory space. Note that
    // g_pui16EPISdram is declared as volatile so the compiler should not
    // optimize reads out of the memory. With this pointer, the memory space
    // is accessed like a simple array.
    //
    g_pui16EPISdram = (uint16_t *)0x60000000;

    //
    // Write to the first 2 and last 2 address of the SDRAM card. Since the
    // SDRAM card is word addressable, we will write words.
    //
    g_pui16EPISdram[SDRAM_START_ADDRESS] = 0xabcd;
    g_pui16EPISdram[SDRAM_START_ADDRESS + 1] = 0x1234;
    g_pui16EPISdram[SDRAM_END_ADDRESS - 1] = 0xdcba;
    g_pui16EPISdram[SDRAM_END_ADDRESS] = 0x4321;

    regards,

    Charles

     

  • In reply to Charles Tsai:

    Hi Charles,

    I understand that the external RAM will start at address 0x60000000 and how to explicit ask for the microcontroller to read and write from such addresses. I'm wondering if it is possible to make this transparent for the rest of my code. Since I already have a few thousand lines of code and several .c and .h files, it would require me a bunch of work and consideration of which variable is going to which memory.

    When I used the MSP430 with FRAM, that would be done by writing a #pragma right before the variable declaration so that specific region would be allocated on FRAM instead of normal RAM. I'm assuming the FRAM memory region was declared on the linker beforehand.

    Again, the example you mentioned shows how to point to a specific address on external RAM, that is clear to me. What is not is how to use the external RAM with minimum hassle on my future code or code rework on my already tested and working code.

  • In reply to daniolip:

    HI Daniolip,
    Are you referring to the #pragma DATA_SECTION ( symbol , " section name ")? You can find details of this pragma and its usage in the compiler user's guide here. www.ti.com/.../spnu151r.pdf. Please note that you will still need to configure the EPI module per the external device type that you want to interface with before you can read/write to the external memory.

    regards,

    Charles

     

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