Other Parts Discussed in Thread: LM94022
ADC1 Sequencer 1 AIN16 (step 0) FIFO rolls mixed hex values compared to very quite AIN9 (step 1), both have sensor LM94022. Reversing sequencer steps moves the noise to AIN9 step 0 , proving AIN16 trace and sensor are not the problem. Multiple MCU have all had the very same issue step 0 AINx must have pull down 3.9k - 4.87k versus any added decoupling capacitance order to reduce SNR on step 0.
Why is ADC1 sequencer 1 step 0 reacting to internal noise but not step 1? No amount of hardware averaging reduce SNR step 0. It seems the issue step 0 worsens as PWM external drive voltage is increased and is highly unexpected behavior. If it were EMI effecting ADC1 sequencer 1 step 0 why would step 1 not show any sign of increased SNR?
Notice DC comparators are providing triggers for PWM0 fault monitoring tied into generator blocks digital comparators as 3 OR'd faults. Perhaps there is a Tivaware underlying issue to properly configure hardware for 3 OR'd trigger inputs into the PWM module? Perhaps a violation on the hardware level as one DC comparator threshold triggers 3 digital comparators of PWM generators? Would code below not be one of several possible logical methods required to configure multiple PWM generator fault behaviors? Datasheet text is not suggesting any such violation possible. However it was prudent to make 3 analog comparator outputs OD tied into 3 PWMnFaults input pins OR'd in a similar way.
MAP_ADCSequenceStepConfigure(ADC1_BASE, 1, 0, PIN_MOSTEMP_HIGH1);//AIN9 MAP_ADCSequenceStepConfigure(ADC1_BASE, 1, 1, PIN_MOSTEMP_LOW1);//AIN16 MAP_ADCSequenceStepConfigure(ADC1_BASE, 1, 2, PIN_MOSTEMP_HIGH1 | ADC_CTL_CMP0); MAP_ADCSequenceStepConfigure(ADC1_BASE, 1, 3, PIN_MOSTEMP_LOW1| ADC_CTL_CMP1 | ADC_CTL_END | ADC_CTL_IE);
/* Configure the extended fault group-1 trigger sources for ADC1 DCMP0/1 MOSTEMP-L/H * ADC0 Digital comparators as fault source (MINFLTPER[0],LATCH[1]/PWMCTLn) */ MAP_PWMGenFaultTriggerSet(PWM0_BASE, PWM_GEN_0, PWM_FAULT_GROUP_1, PWM_FAULT_DCMP0 | PWM_FAULT_DCMP1); MAP_PWMGenFaultTriggerSet(PWM0_BASE, PWM_GEN_1, PWM_FAULT_GROUP_1, PWM_FAULT_DCMP0 | PWM_FAULT_DCMP1); MAP_PWMGenFaultTriggerSet(PWM0_BASE, PWM_GEN_2, PWM_FAULT_GROUP_1, PWM_FAULT_DCMP0 | PWM_FAULT_DCMP1);