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Compiler/TM4C1290NCZAD: TM4C1290NCZAD

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Replies: 5

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Part Number: TM4C1290NCZAD

Tool/software: TI C/C++ Compiler

The SDRAM via EPI is working Properly using uDMA However I’m note able to get end of DMA interrupt.

I’m using similar code to KrishnanCIT_UDMA_EPI.zip

To enable interrupt I add


EPI Interrupt from FIFO in writing works properly!!!

However, I do not receive interrupts from DMA termination

Only EPI_INT_TXREQ works Properly

  1. EPI_INT_TXREQ interrupt when transmit FIFO is below the trigger level.
  2. EPI_INT_RXREQ interrupt when read FIFO is above the trigger level.
  3. EPI_INT_ERR interrupt when an error condition occurs.
  4. EPI_INT_DMA_TX_DONE interrupt when the transmit DMA completes.
  5. EPI_INT_DMA_RX_DONE interrupt when the read DMA completes.

Please help me to resolve this issues.......




  • The EPI is treated as a peripheral, so the following paragraph from the TivaWare Peripheral Driver's Library User's Guide applies.

    Best Regards,
    Bob Crosby

  • In reply to Bob Crosby:

    We need an indication to finish reading from slow memory that is outside the CPU through the EPI

    According to the quote from the user guide it is not possible

    It does not make sense to me that it is not possible to get an interrupt to end of DMA

    Do you know how to Implement an Interrupt to at End of reading from  EPI via DMA ?




  • In reply to haim rozenboim:

    Let me try to be more clear. In your code you need to enable the EPI interrupts for EPI_DMA_TX_DONE and EPI_DMA_RX_DONE. Line 297 in your code is a good place to add it.


    Then in your EPIIntHandler routine, when you call EPIIntStatus(), check for either EPI_INT_DMA_TX_DONE or EPI_INT_DMA_RX_DONE in the return status. I suggest you use the masked value as now you have enabled these two interrupt sources. 

    Best Regards,
    Bob Crosby

  • In reply to Bob Crosby:

    I followed your instructions and still I do not get END DMA interrup

    Attach my files

    Would be happy if you can review the code the

    Thank you




  • In reply to haim rozenboim:

    I took the example from your first post and modified it so that it works. Since the EPI was setup with a 16-bit data bus, I changed the array and transfers to be 16-bits wide. Note the use of the function uDMAChannelAssign() in initDma(). When the uDMA has read 256 16-bit half-words, you get an EPI interrupt with the EPI_INT_DMA_RX_DONE bit set in the masked status register. I did not see a TivaWare function to clear that interrupt bit, so I did it with a HWREG write. Then I start another 256 half-word reads. The CCSv8 project is in the attached .zip file.


    Best Regards,
    Bob Crosby