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Original question:
TIVA EPI-uDMA
Replies: 5
Views: 155
Part Number: TM4C1290NCZAD
Tool/software: TI C/C++ Compiler
The SDRAM via EPI is working Properly using uDMA However I’m note able to get end of DMA interrupt.
I’m using similar code to KrishnanCIT_UDMA_EPI.zip
To enable interrupt I add
EPIIntEnable(EPI0_BASE,(EPI_INT_DMA_TX_DONE|EPI_INT_TXREQ));
EPI Interrupt from FIFO in writing works properly!!!
However, I do not receive interrupts from DMA termination
Only EPI_INT_TXREQ works Properly
Please help me to resolve this issues.......
Regards,
Haim
The EPI is treated as a peripheral, so the following paragraph from the TivaWare Peripheral Driver's Library User's Guide applies.
Best Regards,Bob Crosby
In reply to Bob Crosby:
We need an indication to finish reading from slow memory that is outside the CPU through the EPI
According to the quote from the user guide it is not possible
It does not make sense to me that it is not possible to get an interrupt to end of DMA
Do you know how to Implement an Interrupt to at End of reading from EPI via DMA ?
Thanks
In reply to haim rozenboim:
Let me try to be more clear. In your code you need to enable the EPI interrupts for EPI_DMA_TX_DONE and EPI_DMA_RX_DONE. Line 297 in your code is a good place to add it.
EPIIntEnable(INT_EPI0, EPI_INT_DMA_TX_DONE | EPI_INT_DMA_RX_DONE | EPI_INT_ERR); IntEnable(INT_EPI0);
Then in your EPIIntHandler routine, when you call EPIIntStatus(), check for either EPI_INT_DMA_TX_DONE or EPI_INT_DMA_RX_DONE in the return status. I suggest you use the masked value as now you have enabled these two interrupt sources.
I followed your instructions and still I do not get END DMA interrup
Attach my files
Would be happy if you can review the code the
Thank you
HaimEPI_UDMA.c
EPI_TEST.zip
I took the example from your first post and modified it so that it works. Since the EPI was setup with a 16-bit data bus, I changed the array and transfers to be 16-bits wide. Note the use of the function uDMAChannelAssign() in initDma(). When the uDMA has read 256 16-bit half-words, you get an EPI interrupt with the EPI_INT_DMA_RX_DONE bit set in the masked status register. I did not see a TivaWare function to clear that interrupt bit, so I did it with a HWREG write. Then I start another 256 half-word reads. The CCSv8 project is in the attached .zip file.
/cfs-file/__key/communityserver-discussions-components-files/908/6201.CIT_5F00_UDMA_5F00_EPI.zip