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TM4C1294NCPDT: EPI interface in GPIO mode - Data is read only with approximately half of baud rate- how to fix this?

Part Number: TM4C1294NCPDT
Other Parts Discussed in Thread: ADS930

Hi. We are trying to set up TM4C1294NCPDT EPI interface to read data from ADS930.

Example of low speed read:

I set up  EPI clock to 20 MHz, which is working fine.

Then I check the buffer in which data is being read from EPI FIFO with DMA.

Signal fed into ADS930 ADC is 200 kHz square wave, so I know how many values I would like to see if EPI was truly working with 20 MHz baudrate. 

I see that I am getting almost two times less samples than I would need to get with 20 MHz clock of EPI.

DMA and EPI configuration:

ROM_EPIDividerSet(EPI0_BASE, 4);
// EPIClk = (Divider == 0) ? SysClk : (SysClk / (((Divider / 2) + 1) * 2)) /// 1 -> 120MHz/2 , 2 un 3 -> 120MHz/4 , 4 ->120Mhz/6=20MHz
ROM_EPIModeSet(EPI0_BASE, EPI_MODE_GENERAL);

ROM_EPIConfigGPModeSet(EPI0_BASE, EPI_GPMODE_CLKPIN | EPI_GPMODE_ASIZE_NONE | EPI_GPMODE_DSIZE_8, 0, 0);

ROM_EPINonBlockingReadConfigure(EPI0_BASE, 0, EPI_NBCONFIG_SIZE_8, 0);

ROM_EPIFIFOConfig(EPI0_BASE, EPI_FIFO_CONFIG_RX_1_8 | EPI_FIFO_CONFIG_RSTALLERR); 

EPIIntRegister(EPI0_BASE, EPIInterruptHandler);
ROM_EPIIntEnable(EPI0_BASE, EPI_INT_DMA_RX_DONE | EPI_INT_ERR);
while (HWREG(EPI0_BASE + EPI_O_STAT) & EPI_STAT_INITSEQ) {}

//////////dma config////////////////

//additional abstraction layer is used here for DMA but the Defines are same, so you should be able to get the idea how DMA is configured

EPIRXDMA = NAFT::DMA(UDMA_CH30_EPI0RX, UDMA_ARB_1, UDMA_SRC_INC_NONE, UDMA_DST_INC_8, UDMA_SIZE_8);
EPIRXDMA.setHighPriority(true);
EPIRXDMA.setUseBurst(true);
EPIRXDMA.setDataSource(reinterpret_cast<void *>(EPI0_BASE + EPI_O_READFIFO0));

 

 

I also checked that after DMA RX transfer is completed that there are no more pending EPI reads. EPINonBlockingReadCount returns 0.

Also I have enabled interrupt for RX stall, in case if DMA is transferring data too slow or is busy and FIFO gets full and I lose data, but also this interrupt never triggers- so RX fifo is never full.

I have tried EPI clock of 20 MHz, 15 MHz, 12 MHz but in all cases baud rate was approx. 2 times slower..

Any ideas? I would really appreciate some help.

Karlis

  • Hi,

      I have some questions and comments.

      - Have you measured the EPICLK on the scope and it is at your specified frequency?

      - Have you tried with ROM_EPIDividerSet(EPI0_BASE, 3) so the EPICLK is 30Mhz which matches the ADS930?

      - Can you experiment with FIFO level threshold like EPI_FIFO_CONFIG_RX_1_4?

      - Can you experiment with ping-pong method?