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TM4C129XNCZAD: JTAG Failure

Part Number: TM4C129XNCZAD

The processor is TM4C129XNCZAD, when using XDS200 to download the software to the board, following  errors.

CORTEX_M4_0: GEL Output:

Memory Map Initialization Complete

CORTEX_M4_0: Trouble Halting Target CPU: (Error -2062 @ 0x0) Unable to halt device. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.2.0.00002)

CORTEX_M4_0: Error initializing flash programming: Target failed to read 0x400FE000

CORTEX_M4_0: Trouble Halting Target CPU: (Error -2062 @ 0x0) Unable to halt device. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.2.0.00002)

CORTEX_M4_0: Trouble Halting Target CPU: (Error -2062 @ 0x0) Unable to halt device. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.2.0.00002)

CORTEX_M4_0: Loader: One or more sections of your program falls into a memory region that is not writable.  These regions will not actually be written to the target.  Check your linker configuration and/or memory map.

CORTEX_M4_0: File Loader: Verification failed: Values at address 0x00000000 do not match Please verify target memory and memory map.

CORTEX_M4_0: GEL: File: D:\CCSworkspace_v10\uart_echo\Debug\uart_echo.out: a data verification error occurred, file load failed.

25MHz clock is correct. Power voltage is 3.25V.

Following power and ground pins are found unconnected.

VDD – N16, P17

GND – P16, R17

GNDA – G4

From the power architecture in datasheet, figure 5-4 on page 242, I found that all the VDD pins and GND pins are connected together internally. If this is accurate, missing two pins should not affect the JTAG. 

Please advise what the powers vs function blocks are, if above unconnected pins cause the JTAG failure? How the failure can be resolved?