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TM4C123AH6PM: TMS pin shortcut with 3,3V

Part Number: TM4C123AH6PM

Hello all,

I use the TM4C123AH for about 3 years to produce our boards, on about 1000 mounted boards I had problems with about 20 boards.

I can not program the boot using Jtag 10 pin (Keil Ulink-2), the TMS pin is locked to 3.3V, measured 180 Ohm with a multimeter between TMS and + 3.3V, and 690 Ohm between TMS and ground.

Sometimes with the TMS pin I encountered problems with the TCLK pin (1.4KOhm to ground) or TDI (1.5KOhm to ground)

Replacing the microprocessor the card works.

TMS, TCLK, TDO, TDI are only connected to the microcontroller, TMS, TCLK and TDI have a pullup of 100K to 3.3V.

Someone has ever encountered this problem.

  • The symptoms you describe lead me to suspect the parts are being damaged by an electrical overstress (EOS). I am not familiar with the Keil Ulink-2. Is it driving the TMS, TCK and TDI pins before the part is powered up? You may want to consider limiting the current on the JTAG connector if it is not already limited. (120 Ohm series source resistance also helps match the line impedance.)
  • Vendor's Bob gives - I believe - sound advice. (especially the ~100Ω series Rs - to protect JTAG pins of the MCU)

    Your use of 100K for pull-up values is NOT "normal/customary" - being even higher value than the (always suspect) MCU's internal resistors. Generally accepted belief is that 4K7-10K pull-ups reduce board signal reflections while achieving proper signal edges - as felt @ the MCU...

    To your board failures (which register as MCU failures) you do not describe the "entirety" of "board handling - protective measures" and other safety factors - during board assembly and other necessary inspection & handling.      ANY "weak link" along that chain may cause damage.       As your "percentage" of such failures is "low" - it is doubtful that your ULink is the cause agent.

    Cable length & routing from the JTAG Pod to your board should be short/direct - and the cable should not be left, "connected ONLY to the MCU board" - where your UNPROTECTED JTAG inputs sit "exposed/unguarded" (for now)  thus at HIGH RISK!

  • Thanks for the answer,

    I used the 100K for pullup because I followed Keil's instructions for ULINK-2.

    Now I will try to consider the entire production chain.

    Best regards

  • Thanks for the answer,
    Surely I should have included 100R resistors on my board to protect the signals.
    Thank you for your suggestion.
  • Alan Caravaggi said:
    I used the 100K for pullup because I followed Keil's instructions for ULINK-2.

    You may wish to contact Keil then - and note the (strong & elevated) chance for "Signal Reflections and Rounded Signal Edges" - when such (high) value (i.e. 100K) pull-ups are employed.

    Firm/I have made numerous client "Rescue Visits" - aimed toward "multiple vendor" MCUs - and many "repairs" by switching from MCU's INTERNAL pull-ups (50-75K on average) to 4K7-10K (external)!

    It IS possible (yet highly unlikely) that the Keil MCU (or buffer) is unable to "sink" the "0.33mA" - resulting from such a 10K pull-up when Keil's Pod drives the line low.

    It is guaranteed that the "instruction to employ 100K as JTAG/SWD "pull-up" is FLAWED!"

  • The Keil use a 74LV125A as outpu buffer, and I think that there is no problem to drive a 4K7 pullup resistors.
    For new projects I'll try to use 4K7 pulups and 100R series to protect the MCU pins.
    Thanks
  • Good that - note that (even) if that "Fails to restore order - your few flawed MCUs" you will gain a more robust and protected MCU System for all future operations.

    If you ask Keil re: 100K pull-up "instruction" - I am certain that they will prove UNABLE to justify it!