Hello, I need a clarification about DRV8705-Q1 datasheet.
Why, on page 42 of the dtasheet, the IC_STAT_2 Register reset value is 10h,
while in the following table, the reset condition is all bit = 0?
Thank you
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Hello, I need a clarification about DRV8705-Q1 datasheet.
Why, on page 42 of the dtasheet, the IC_STAT_2 Register reset value is 10h,
while in the following table, the reset condition is all bit = 0?
Thank you
Hi,
Thank you for interested in DRV8705-Q1. Since all D7-D0 reset value are 0, Register reset value should be 0h. 10h is not correct and typo.
regards
Shinya Morita