Other Parts Discussed in Thread: UCC27200
Is the any simulation model for the DRV8300NRGER?
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I'd like to verify that my bootstrap component selection is sufficient for my application and I would also like to see at what point the loop inductance will be an issue. For this design the FETs that the DRV8300 are driving are on separate boards (board to board connection) so I am limited to how short I can make the traces. I would like to make the traces as wide as possible to reduce inductance, but the boards are small and my space is limited so I would like to see what is the min loop inductance requirements I would need to meet.