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DRV8305-Q1: WAKE

Genius 4345 points
Part Number: DRV8305-Q1
Other Parts Discussed in Thread: TEST

Our customer has following questions about DRV8305-Q1 WAKE pin .

1.Regarding the electrical characteristics, the input voltage of WAKE is "Output logic low (high) voltage".

VIL_WAKE   Output logic low voltage

VIH_WAKE  Output logic high voltage

Is input correct and output incorrect?

2. Please let us know which of the following 1) and 2) is correct for the LOGIC-LEVEL voltage of the electrical characteristics.
Example) In the case of WAKE

 1) Hi is recognized when a voltage within the range of 1.46 to 1.8V is input.

 2) Hi threshold voltage is a voltage within 1.46 to 1.8V, and if a voltage above the threshold is input, Hi is recognized.

3.In the data sheet "7.4.4 Sleep State", there is a description that "For the DRV8305-Q1 to be brought out of sleep, the WAKE pin must be at a voltage greater than 3 V".

Is this 3V different from VIH_WAKE?

Please give us your advise.

Regards,

Kura

  • Hi Kura-san,

    1) The way to interpret the VIL_WAKE and VIH_WAKE specs are as follows:

    The WAKE pin is a logic low if the falling voltage goes below anywhere from 1.1-1.45V depending on the device. For guaranteed low WAKE voltage, ensure WAKE  < 1.1V. 
    The WAKE pin is a logic high if the rising voltage goes above anywhere from 1.46-1.8V depending on the device. For guaranteed high WAKE voltage, ensure WAKE > 1.8V. 

    2) Good catch. One of us can try the WAKE pin on the bench in lab to test if the device wakes after ~1.8V or after 3.0V. We'll get back soon. 

    Thanks,
    Aaron

  • Hi Kura, 

    Following up on this one - I looked into the datasheet as well as some bench test data and have the answer for you below: 

    1. In the case of how to interpret the WAKE VIH spec, 
      1. your statement#2 is correct: "Hi threshold voltage is a voltage within 1.46 to 1.8V, and if a voltage above the threshold is input, Hi is recognized"
      2. the VIH threshold will move around between those two ranges claimed in the datasheet (1.46V - 1.8V), and this is mainly because of the temperature you are operating the device in. Other factors like manufacturing process variation will also have a small impact in what the exact threshold will be between different devices, but all devices will have a value guaranteed within that range by design and test coverage 
      3. Once you provide the device with a WAKE pin voltage above that exact VIH threshold, then it will recognize it as a logic 'high'
      4. therefore, it is best to give it a voltage noticeably higher (above the upper end of 1.8V) just to guarantee that the wake will be logic 'high' 

    2. In the case of the datasheet section 7.4.4. mentioning 3V
      1. we believe that this is a typo, and that you should rely on the WAKE VIH spec in the electrical characteristics table 

    Thanks and Best Regards,
    Andrew

  • Aaron-san

    Thank you for your support.

    We got additional questions from customer. Please advise us following.

     

    4.Please let us know about LOGIC-LEVEL INPUTS such as INHx as well.

    Please let us know which of the following 1) and 2) is correct for the LOGIC-LEVEL INPUTS such as INHx.

     1) Hi is recognized when a voltage within the range of 2 to 5V is input.

     2) Hi threshold voltage is a voltage within 2 to 5V, and if a voltage above the threshold is input, Hi is recognized.

    In this case, If 2) is correct, does it mean that the customer must input 5V to 5.5V to ensure Hi recognition?

    (Since the absolute maximum rating of INPUT PIN such as INHx is 5.5VMAX,)

    5.About output voltage of GHx,GLx

    Please let us know Output voltage of GHx,GLx at Lo..

    Regards,

    Kura

  • Hi Kura, 

    Sure - please see inputs below: 

    1. For the logic-level inputs spec,
      1. I would interpret this as your point #1 -> a 'high' is recognized reliably when the input voltage is between 2V and 5V, 
      2. the other spec of VIL would be that a voltage between 0V and 0.8V will be recognized reliably as a logic 'low' 
    2. Gate Driver outputs GHx/GLx
      1. the output voltage for 'low' is just targeting 0V between gate and source voltage of each MOSFET 
      2. when the gate driver receives a logic low for the corresponding inputs (INHx, INLx), then the output will pull low 
        1. this means GHx = SHx for the HS FET voltages
        2. and for the LS FET, GLx = Gnd (or SPx) 
      3. when the INHx/INLx is recognized as a logic high, then the outputs will target approx 10V between gate and source of each MOSFET 

    Thanks and Best Regards, 
    Andrew