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DRV8243-Q1: any connection between the logic pins and Vm ?

Expert 7280 points
Part Number: DRV8243-Q1

Dear team,

Would you be able to help me answering the following question regarding DRV824xS-Q1 (it would also apply to the H version)

  1. is there any risk in driving the SPI, nSLEEP, and other logic pins while VM is off (=0V) ?
  2. is there any connection between these pins and VM which might lead to a significant current leakage ?

Thanks a lot!

Best regards,

PA

  • PA,

    1)  This is no issue.  

    2)  DRVOFF and nSCS both have pull-ups to internal LDO that is fed from VM.  However, per the block diagram, there are blocking diodes there.  Everything else is a pull-down.

    Regards,

    Ryan