Dear team,
Would you be able to help me answering the following question regarding DRV824xS-Q1 (it would also apply to the H version)
- is there any risk in driving the SPI, nSLEEP, and other logic pins while VM is off (=0V) ?
- is there any connection between these pins and VM which might lead to a significant current leakage ?
Thanks a lot!
Best regards,
PA