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DRV8316REVM: SPI Undershoot and Ringing

Part Number: DRV8316REVM

Hello,

I was probing the SPI line on the DRV8316REVM and I was seeing ringing/undershoot on edge transitions on many lines:

Open Drain MISO

CH1: SCLK, CH2: MISO, CH4: CS

Push Pull MISO

CH1: SCLK, CH2: MISO, CH4: CS

I found a custom board that used 3x DRV8316s on the same SPI bus and probed the SPI to see if this issue was present on different boards:

CH1: SCLK, CH2: MISO, CH4: CS

It looks like the undershoot is still prevalent on the MISO line.

I guess what I am trying to ask is what approach should we go about this?

Better layout? Series resistors? RC filter at the MCU side for MISO?

Is this a known issue with this device? Or is this still a measurement setup issue on my end?

  • Hi Jerome,

    The ringing/undershoot on MISO line seems characteristic of an open drain output. Because this is an open-drain output, the MOSFET that pulls SDO to a logic low is a hard switch and causes the ringing/undershoot. Is this an EMI concern for your application?

    You could try implementing an RC snubber from SDO to GND to dampen the ringing, but this will affect the peak SDO output voltage and the RC time constant of the open drain pullup when SDO is not driven actively low through the FET. 

    Thanks,

    Aaron