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DRV8343-Q1: SPI-SCK Input logic hysteresis and waveform non-monotonicity

Stephen Thomas
Intellectual 710 points
Part Number: DRV8343-Q1

Hello,

The datasheet of DRV8343SPHPRQ1 states there exists an input logic hysteresis of 182mV (typ) for the SCLK pin.

We would like to confirm in such a case whether the following non-monotonicity in the SCLK waveform would be of no concern for the SCLK normal operation.

The said non-monotonicity exists for 6.673mV and for a time period of 112.7ps. We expect this waveform distortion will be rejected by the input hysteresis ( as 6.673mV < 182mV) which will prevent a false switching.

Please confirm.

Also please let us know if there exists a minimum specification for the input hysteresis.

  • 0
    TI__Mastermind 18916 points

    Hi Stephen, 

    Thanks for posting your question to the e2e motor drivers forum.

    From reviewing the info in your question, I believe what you are saying should be correct. 

    The input hysteresis should take effect w/ a typical value of 182mV, which will successfully reject a fluctuation of 6.673mV in magnitude.

    As for a minimum input hysteresis value, we don't have a formal datasheet spec for this - 

    • But from looking at some validation data, you may be able to expect a minimum hysteresis value around 80mV.

    Thanks and Best Regards, 
    Andrew 

  • 0 in reply to Andrew Liu
    Intellectual 710 points

    Hi Andrew,

    Thank you for the confirmation.

    Regards

    Stephen