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DRV8432: Permanent damage to DRV8432 when motor shaft spun.

Part Number: DRV8432

We have an application where it is possible the motor shaft is spun with no control power to the product.

At this time the motor is a generator and is converted to DC Bus power thru the flyback diodes in the DRV8432 between PVDD_x and GND_x.

We have seen some unit’s fail and cause permanent to the DRV8432 in this case.

Several things to note I have seen in the investigation as to why the component is damaged.

First, how is it possible to have the absolute maximum rating of OUT_x to GND_x of -0.3V in the datasheet?

The lower flyback diode between OUT_x and GND_x forward voltage is stated in the data sheet as 1V. In testing, the forward voltage is near 0.75V, giving a voltage actual of -0.75V (or -1V by data sheet) from OUT_x to GND_x when the motor is acting as a generator, which occurs when braking or reversing a motor as well.

The 12V power rail, VDD, for the DRV8432 in our design is generated off the PVDD_x voltage net, and when the PVDD_x reaches above 17V, the 12V VDD power rail energizes.

The datasheet states there is no required power sequence between VDD and PVDD_x.

In our design the RESET_AB and RESET_CD and connected together and pulled low via a 1K resistor to GND and driven by the CPU.  In the case where the motor shaft is spun with no control power, the CPU does not have time to power up and boot before the PVDD_x rail discharges, so the CPU does not drive the RESET_AB, RESET_CD net during this time.

What I see is the RESET_AB and RESET_CD voltage will immediately drop to -0.35V respect to GND and remain there until the VDD power rail is energized.  At that time the voltage at RESET_AB and RESET_CD returns to 0.0V.  There is 0.0V deviation between GND_x, AGND, and GND of the CPU the entire time.  Identifying the cause that the internal logic of the DRV8432 must be driving below ground and seen as a negative voltage on RESET_AB, RESET_CD until the VDD power rail is energized.

What can be done to remedy the situation of damaging the DRV8432?

Is there a safe zone to have the motor spinning, example - a large inertia motor spinning during an Estop situation, that will not damage the DRV8432?

  • Andrew,

    Thank you for you post.  

    Will take this step by step and start with the abs. max. question.  This is an error in the datasheet.  Like you noted, during reversing (or fast decay), current will flow thru that lower diode and output will be below GND.  This is not the cause of the damage you are seeing.

    Regarding the RESETx signals, this is an interesting observation.  VDD supplies the voltage for the internal logic and yes, this is typically regulated off the main supply.  In fact, our EVM is the same way.  So, like your case, VDD on our EVM comes up after PVDD.  I have not seen this negative voltage before and not sure what the internal path is that would cause this, but also don't think that is the issue.

    What voltage is the PVDD supply rising to as it is being "pumped" up by the external motor operation?  Controlling this below PVDD recommended max. with clamping diodes or larger bulk capacitance, to absorb the energy, should be the solution to this problem as it is quite common.

    Regards,

    Ryan

  • Ryan,

    Thank you for your response.

    We are only seeing the voltage feedback of the motor pumping the DC bus up to 25V when turned by hand as fast as we can.  This we have disregarded as the root cause, as the voltage is not higher than the normal operating range of our final product.  We have 2000uF bulk capacitance in the final design.  If we cannot identify a cause then I must place this on a batch of components that were damaged in other means, such as handling.  We have shipped over 1000 units and have only seen this on a hand full of devices on the last shipment.  But concerning that our customer noticed this in their production when moving the motor shaft to align mechanically.

  • Andrew,

    It appears you have plenty of margin if you are only seeing 25V.  

    Do you do any testing before shipping to customer?  Most handling ESD events will cause a zero time issue and if it passes your internal testing, maybe not handling rated.

    System level ESD is another story.  These events are much more severe.  Here is a good app note on the topic:

    https://www.ti.com/lit/an/slyt492/slyt492.pdf

    Regards,

    Ryan