• State
  • Locked Locked
  • Replies 6 replies
  • Subscribers 29 subscribers
  • Views 235 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8432: DRV8432DKD Motor Driver Switching Fault

Fahri Türedi
Prodigy 30 points

Part Number: DRV8432

We are using DRV8432 in PFB mode to drive a brushed DC motor. The circuit schematic is given in "drv8432_cct.png". The PVDD voltage is 28V, and the switching frequency is 100kHz. We are using closed loop current control to drive the motor. During operation at around 10A, the driver time to time supplies approximately 0V to the motor as can be seen in the "Voltage_Current.jpg" oscilloscope screenshot in which the yellow line shows the current waveform and the blue line shows the voltage waveform between the motor terminals. Normally, I expect the driver to switch the voltage between +28V and -28V since we are using it in PFB mode. And since the current is lower than the current limit, I don't think that the driver is entering cycle-by-cycle current limit protection. Even if it does enter the cycle-by-cycle current limit protection, it shouldn't be supplying approximately 0V to the motor since in the datasheet it says during cycle-by-cycle current limit protection the half bridge is being set in Hi-Z state.

I also probed and observed the VREG voltage of the driver referenced to the AGND pin. As can be seen from "VREG_Oscillations.jpg" oscilloscope screenshot, the VREG voltage also oscillates during the 0V cases. In the screenshot, the yellow waveform represents the current, the blue waveform represents the voltage between the motor terminals and the green waveform represents the VREG voltage of the driver referenced to the AGND pin. I also observed the PWM waveforms on the PWM_A & PWM_B pins of the driver. These waveforms also seem to be affected similar to the VREG voltage during the 0V cases.

Then I changed the 100nF capacitor between the VREG and AGND pins with 1uF capacitor. This change more or less solved the oscillation issue on the VREG voltage but the 0V case still continues.

  • 0
    TI__Mastermind 37683 points

    Hi Fahri,

    Thank you for the question.

    We are reviewing your question and will reach out to you with a reply within 24 hours.

    Regards,

    Pablo Armet

    Applications Engineer

  • 0 in reply to Pablo Armet
    TI__Mastermind 37683 points

    Hi Fahri,

    Something odd is happening with this driver. You're measuring up to 15A current when the OC has been set to 10-A. I suspect the driver to be damaged. Have you tried replacing the driver with new one. Has this issue been observed in other boards and ICs?

    I did notice in the schematic that there is no electrolytic bulk capacitor on PVDD. Is this somewhere else in the schematic. This capacitor is crucial and will lead to large ripple and swings on PVDD supply. This capacitor needs to be placed very close to the driver.

    Regards,

    Pablo Armet 

  • 0 in reply to Pablo Armet
    Prodigy 30 points

    Hi Pablo,

    Thank you for your attention and quick response. But we are using the driver in Parallel Full-Bridge (PFB) Mode, which doubles the current limit (10Ax2 = 20A) supplied to the motor armature winding since two half-bridge legs are paralleled.

    I tried replacing the driver with a new one but it didn't solve the issue. I observed this issue on two separate boards with the same layout and design.

    Do you think the driver is entering cycle-by-cycle OC limit during those moments? Could there be any other reason or mechanism that causes the driver to show this kind of behavior? 

  • 0 in reply to Fahri Türedi
    TI__Mastermind 37683 points

    Hi Fahri,

    Fahri Türedi said:
    Thank you for your attention and quick response. But we are using the driver in Parallel Full-Bridge (PFB) Mode, which doubles the current limit (10Ax2 = 20A) supplied to the motor armature winding since two half-bridge legs are paralleled.

    You are correct. it makes sense now why current is above 10-A.

    Fahri Türedi said:
    Do you think the driver is entering cycle-by-cycle OC limit during those moments? Could there be any other reason or mechanism that causes the driver to show this kind of behavior?

    IT does look like it is entering CBC OC. Can you zoom in near where the current settles and become more stable.

  • 0 in reply to Pablo Armet
    Prodigy 30 points

    Hi Pablo,

    The same action continues after the current settles and becomes more stable. In fact, after a while I get "Temperature Warning" and some seconds after that the driver generates "fault" and shuts down which I believe due to the overtemperature protection.

    Why would the driver enter the CBC OC protection when the current is below the OC limit? Is it possible that the one of the paralleled half-bridge legs is carrying more current than the other, which triggers the OC protection since the protection is applied for each half-bridge separately?

    I also wonder if it is normal for the VREG voltage to be oscillating in such a way during the OC protection action?

  • 0 in reply to Fahri Türedi
    TI__Mastermind 37683 points

    Hi Fahri,

    Fahri Türedi said:
    Why would the driver enter the CBC OC protection when the current is below the OC limit? Is it possible that the one of the paralleled half-bridge legs is carrying more current than the other, which triggers the OC protection since the protection is applied for each half-bridge separately?

    I don't think this is what is happening here. You can verify if one half-bridge carries more current than the other but I suspect not to be the case.

    Fahri Türedi said:
    In fact, after a while I get "Temperature Warning" and some seconds after that the driver generates "fault" and shuts down which I believe due to the overtemperature protection.

    If you are getting over-temperature shutdown, it most likely means the current at 10-A is higher than expected temperatures over time. 

    Fahri Türedi said:
    I also wonder if it is normal for the VREG voltage to be oscillating in such a way during the OC protection action?

    NO. Vreg should be stable if filtering cap is placed. Can you measure the impedance of VREF pin to AGND? I would like to know if there is any leakage path. This might give more insight.

    Regards,

    Pablo