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DRV8320: Fault Condition

Brian Wang0928
Genius 12890 points
Part Number: DRV8320
Other Parts Discussed in Thread: STRIKE, DRV832X

Customer is using DRV8320 HW version.

In the d/s there is a Fault diagnostic table for SPI as below. is it also applied to HW version? if not, is there a similar table to address the fault conditions for HW version?  It's good if you can offer the fault conditions for HW. it's not clear in d/s. 

When there is a +/-1KV surge strike on the 24V input, the Fault signal is activated LOW level and then the device is latched. We're looking for where fault is triggered? Could you help on this ! thanks.  

CH3: 24V input voltage CH4: FAULT

  • 0
    TI__Prodigy 620 points

    Hey Brian!

    Thanks for reaching out!

    Brian Wang0928 said:
    In the d/s there is a Fault diagnostic table for SPI as below. is it also applied to HW version? if not, is there a similar table to address the fault conditions for HW version?  It's good if you can offer the fault conditions for HW. it's not clear in d/s

    The hardware version of DRV8320 indicates that a fault is present with the nFAULT output, but does not indicate what fault has occurred. The details of the fault are contained inside registers for the SPI version of the device only.

    Brian Wang0928 said:

    When there is a +/-1KV surge strike on the 24V input, the Fault signal is activated LOW level and then the device is latched. We're looking for where fault is triggered? Could you help on this ! thanks.  

    CH3: 24V input voltage CH4: FAULT

    Could you clarify what ESD model you are using? DRV832x is rated for +/-3000V using the Human-Body Model (HBM) or +/-1000V Charged-device model (CDM)

    Can you check to see if the nFAULT goes back to a logic high after powerup, or is the fault pin always low after the ESD event is introduced? If the fault always stays low, then device damage may have occurred in which we need to investigate which pin(s) are causing the fault to stay low. The easiest way to determine if other damage has occurred is to check the impedance of each pin with respect to GND on the damaged device to an undamaged device. Check to make sure these impedances are the same on the device that has been entering the fault mode to ensure no damage has occurred.

    Since the hardware version of the device does not produce fault codes, you should investigate each case that could cause a fault:

    • Vm UVLO - Lockout occurs at 5.6V typically. It does not appear to do this in the oscilloscope screenshot, so we can rule this out
    • VCPU UVLO (Charge pump UVLO) - The cutoff voltage is 2.8V+Vm. Monitor the VCP pin voltage with respect to Vm and see if this is possibly being tripped
    • OTSD/OTW - Temperature shutdown is unlikely given how short the voltage spike duration was

    See pages 16 and 17 in the datasheet for more fault trip characteristics.

    Is the device in sleep mode or operating mode when the ESD event is introduced?

    Thanks!

    Tyler McCulloch