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DRV8300: boot up and shutdown time

Part Number: DRV8300
Other Parts Discussed in Thread: DRV8305, DRV8328, DRV8329

I need to implement a hardware disable feature on a 3 phase motor driver using the DRV8300.  I am wondering if it's possible to implement this by using a discrete MOSFET to switch the power to the GVDD pin of the DRV chip, and if so, how quickly the enable and disable functionality will work.  I assume this "power switch" transistor would be located between the bypass capacitor and the power supply rail. 

  1. Approx. how long will it take the DRV8300 to discharge its bypass capacitor from 12V to 4.2V (where the undervoltage lockout kicks in)? Would it require several transitions of the input PWM signal to dissipate the stored energy?
  2. What is the time delay between when GVDD < GVDDUV (power supply voltage < undervoltage lockout threshold) and when the gate drive outputs go to the hi-z state?
  3. Assuming one of the PWM logic level inputs is high, what is the time delay between when GVDD > GVDDUV (power supply voltage > undervoltage lockout threshold) and when the corresponding gate drive output will be driven to the on state?
  4. Are there any concerns with disconnecting the power to the GVDD pin without disconnecting the bootstrap pins?

Thanks for any feedback!  I was hoping to use the DRV8305 (with a dedicated enable input) for this application, but now that part is not available.

  • Hi Ben,

    I need to implement a hardware disable feature on a 3 phase motor driver using the DRV8300.  I am wondering if it's possible to implement this by using a discrete MOSFET to switch the power to the GVDD pin of the DRV chip, and if so, how quickly the enable and disable functionality will work.  I assume this "power switch" transistor would be located between the bypass capacitor and the power supply rail. 

    By "hardware disable", is this the equivalent of the sleep mode? Ideally you'd want to minimize GVDD current consumption, which would be as you guessed.....disconnect GVDD power entirely. 

    The easiest method to do this is by using a NMOS cutoff switch. We have an app note that shows how to implement this here: Cutoff Switch in Motor Driver Applications 

    To turn this MOSFET on, you will need to generate a voltage about 10V higher than GVDD, so you'll need to likely need a buck regulator, boost converter, charge pump, or some other circuit to generate the GVDD+10V voltage. This voltage to go to the gate of the cutoff switch should be controlled by some sort of logic-level switch circuit, which looks like below. 

    Approx. how long will it take the DRV8300 to discharge its bypass capacitor from 12V to 4.2V (where the undervoltage lockout kicks in)? Would it require several transitions of the input PWM signal to dissipate the stored energy?

    Depends on the PWM frequency, gate drive source current, and bootstrap/GVDD bypass capacitor values. The time is hard to tell depending on all those factors. 

    What is the time delay between when GVDD < GVDDUV (power supply voltage < undervoltage lockout threshold) and when the gate drive outputs go to the hi-z state?

    5-13 us deglitch time. See below. 

    Assuming one of the PWM logic level inputs is high, what is the time delay between when GVDD > GVDDUV (power supply voltage > undervoltage lockout threshold) and when the corresponding gate drive output will be driven to the on state?

    When GVDD > GVDDUV rising threshold, recovery is automatic so once the threshold is exceeded gate drive output will be driven to the ON state after the propagation delay and rise time. 

    Are there any concerns with disconnecting the power to the GVDD pin without disconnecting the bootstrap pins?

    I don't see any concerns with leaving the bootstrap pins connected. Since the bootstrap caps are typically ceramic capacitors, worst case there is a negative polarity from BSTx-SHx but SHx current should flow through the high-side MOSFET body diodes back to the motor supply. 

    FYI: Alternatively you could try the DRV8328 or DRV8329 which is a 3-phase BLDC gate driver with <1uA sleep mode current. It is rated for up to 60V abs max and has 1A/2A sink/source current with extra protections. 

    Thanks,
    Aaron