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DRV8302: GVDD undervoltage issue

Part Number: DRV8302

Hi team,

Here's an issue from the customer may need your help:

NFAULT will report an error immediately after EN_gate is turned on. GVDD was also detected as only 5.8 V. The GVDD pin of the chip is then found to be floating and not grounded by a capacitor.

Is the GVDD undervoltage caused by floating pins? Thanks.

Best Regards,

Cherry

  • Hi,

    Adding some details:

    The customer tried to fly a 2.2uf capacitor across the GVDD pin and connect to ground, but GVDD was still undervoltage.

    DVDD = 3.3V, AVDD = 6.6V, which should be normal.

    If the GVDD capacitor is grounded with AGND and AGND is connected to PWRGND at a single point away from drv8302, will GVDD always be undervoltage?

    Also, GVDD is generated by an internal buck circuit and used for gate drive, why must GVDD pin be externally cap-tied and grounded?

    Best,

    Cherry

  • Hi Cherry, 

    Our team is currently out of office for a US holiday, so responses may be delayed.

    Please give us further time to review & reply to your question, with a new reply next week on debug comments and next steps 

    As a preview of the answer, can they provide any particular waveforms of the GVDD waveform on the same plot as nFAULT, so that we can verify this is indeed the behavior happening? In short summary, yes GVDD UVLO will be a possible fault if the GVDD supply input is not given proper external components to maintain the stable voltage input. The value, rating, and placement of the capacitor on the PCB will have an effect on its intended function (e.g. good implementation helps stabilize GVDD, whereas bad implementation may not do enough to stabilize GVDD if system is noisy).

    Best Regards, 
    Andrew 

  • Hi Cherry, 

    Please let us know if you require further assistance on this debug. 

    If not, please help mark thread as resolved. Thanks 

    Best Regards, 
    Andrew