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DRV8305: Gate timing interpretation

Part Number: DRV8305


I have a question regarding the gate timing of the DRV8305. In your Datasheed (Revised February 2016) in the electrical characteristics table under Gate timing (page 10) there're two parameters named t_pd_If-O and t_pd_Ir-O which are described by "Positive input rising/falling to GHS_x rising/falling".


I have measured the device with an oscilloscope trying to figure out the timing and can't really figure out where these time parameters show up. So I have 2 questions:


  1. What does "Positive Input" mean? Is that INH_x?

 2. Could this parameter be the time between INH_x rising/falling and the low side gate GLS_x rising/falling?

  • Hey Fabian,

    Thank you for your question.

    I just want to confirm that the device in question is DRV8305 and not DRV8305-Q1

    Yes, positive input should be referring to INHx pin which controls GHX pin. This time refers to the timing delay between the input and the output as tested by the conditions mentioned.

    Please note that there is no min and max spec defined for this value and only a typical so we can expect to see some fluctuation.