Other Parts Discussed in Thread: DRV8316
Tool/software:
We are using the 8316RQ for development and we need to modify the configuration via SPI because the current gain is not enough. During the modification we found that the MISO (i.e. the output of the 8316RQ was not as expected, it was always 3V3)It's taken a long time, but I still haven't found the cause...Please help to analyse .Thanks.

The following is the timing flow for unlocking all registers
In the photo below:
clk & SDO(always high)

In the photo below
the clk is about 3M (<5M), and the two bytes of MOSI are 0X06 (register address 3, even parity: 1) and 0X03 (unlocked) respectively

clk & nSCS

clk & nSleep

sch

Perform a read operation to register 0. SDO is also always high!



