Other Parts Discussed in Thread: DRV8718-Q1
Tool/software:
Gate driver (e.g DRV8714-Q1) has VDS over current protection. One of common debug work of gate driver is false VDS over current fault. Even if motor current is not high, VDS over current could be detected.
Because VDS over current is not directly measuring motor current, but monitoring VDS voltage of external FET, false fault flag could happen.
Here is common debug process as 1st step.
1)Read back status register of VDS fault. Then we can figure out which channels or HS/LS has VDS fault.
2) For DRV8714-Q1/DRV8718-Q1, nFault(nFLT) pin is shared with DRVOFF. Need to set register to have nFLT signal. Add external pull up resister on DRVOFF/nFLT pin.
3) Capture waveform when nFault signal goes low(single trigger mode on oscilloscope). Then capture waveform together with SHx, DRAIN pin, PVDD pin, I_OUT(SHx).
Suggest to have 10us/div, 1ms/div. and ~100mV/div range.
We may see DRAIN-SHx voltage has the gap to trigger VDS over current protection.
