DRV3901-Q1: Problems reading the trigger status from STATUS0 register

HI Jeffrey,

Thanks for your question.

Just to be clear, Can you confirm if you are reading Status0 or Status 1.

In Status0 , you should be using <12-11> for TRG1 and <10-9>  for TRG2 pins

In case you can using STATUS1 both bit 13 and 12 are used for TRG1 status. ( this is needed for the NAD conflict resolution explained in the application section)

Please confirm which status registers you are reading. Also can you give me a byte information of the read back of the registers.

Thanks,

Ibinu

Ibinu,

I am reading STATUS0 and looking for Trig1 bits 11,12 and Trig2 bits 10,9.  I have looked at the SPI traffic on a logic analyzer with the trigger inputs.  I can confirm that when trigger 1 is high the status0 bits 12,11 read as 0,1.  When trigger 2 is high status 0 bits 10,9 read as 1,0.  

Jeff

Hi Jeff,

Thanks for confirming the register bits

The expected behavior for TRGx_PIN_STAT for the level based triggers should be 

1h = Pin high
2h = Pin low

Can you check if you are able to toggle Trig2 and is able to see any change in the register bits. 

Also, I would want to probe the voltage level on the Trig2 pin to check if there is any issues on the hardware side.

Thanks,

Ibinu

Thanks Jeff for confirming