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DRV8353F: Regarding register setting for gate driver output signal (Vgs) verification

Part Number: DRV8353F

Tool/software:

I want to verify the gate driver output signal (Vgs) with all switching elements removed. Please recommend register setting to prevent output deactivation due to fault occurrence.

  • Hello,

    I'm a little confused as to what you are asking for? Are you asking for a register setting that would disable gate outputs? Or are you wanting to turn off all fault detections?

    Regards,

    Yara

  • Thank you for your answer.

    I want the gate signal to be output. It seems that the gate signal is not output due to fault detection when there is no switching element.

  • Hello, 

    Can you clarify which faults you are seeing? Sometimes it is not recommended to ignore what faults the device is detecting as this could potentially cause the device to operate in conditions that would result in abs max violations.

    If you are working with the SPI variant then you can use this register to enable and disable some of the protection features

    If you are working with the Hardware variant then unfortunately most of the protection features are always enabled.

    Regards,

    Yara

  • First, VDS_H and VDS_L faults occur. It seems that an error occurs in the voltage measurement because the FET was removed.

  • It seems that an error occurs in the voltage measurement because the FET was removed.

    Which FET was removed? and why? What is the application? Was there a fault before the FET was removed?

    Regards,

    Yara