DRV8350: nfault problem

Johnson David

Part Number: DRV8350

Tool/software:

Dear. Ti team

we are currently using the DRV8350RH

We have encountered a slight issue where we change the enable pin of the gate driver IC from low to high, the nfault pin drops from high to low and then back to high, causing an error in the MCU that recieves the nfault input.

The nfault pin drops approximately 5V level to about 2V within about 1us.

since the nFault pin is low active, it has been connected to gate driver output voltage of 5V through a pull-up resistor of 10kohm.

additionally, there is no voltage drop in the gate driver output voltage of 5V when changing the enable pin from low to high.

please help us with how to resolve this issue.

Best regards

5 months ago

+1 Ryan Kehr 5 months ago

TI__Guru 55595 points

Hello!

I believe you are seeing behavior like the the post below that is expected when exiting the "sleep" state.

https://e2e.ti.com/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/974147/drv8350-nfault-is-asserted-when-enable-pin-is-brought-low

Would there be a way to mask the interrupt in the MCU when you cycle the enable pin? An analog fix to this would be to add some capacitance on the nFAULT line to hold up the signal during this condition.

Regards,

Ryan

0 Johnson David 5 months ago in reply to Ryan Kehr

Prodigy 80 points

Thanks!

I have another question regarding yout answer.

1. Is there a way to mask the nFault signal when enabling or disabling the gate driver from MCU?

2. If apply a bypass capacitor to the nFault pin, what should its value be?

+1 Ryan Kehr 5 months ago in reply to Johnson David

TI__Guru 55595 points

Hello again,

1. Unfortunately there is no way to mask in the driver itself. The device is coming out of a sleep state and the internal FET on the nFAULT pin is pulling down initially until the device is fully awake and then it releases to a HIZ state. This will have to be masked in your MCU for a period after you set ENABLE = high.

2. I don't have a specific value. Just a suggestion to hold up the nFAULT pin above the Vth of your GPIO in your MCU to avoid a false flag. I personally thinki it is better to mask in software.

Regards,

Ryan

0 Johnson David 5 months ago in reply to Ryan Kehr

Prodigy 80 points

Thanks!

Last question

1. If the conditions specified in the datasheet occur in the gate driver, causing an nFault, will the nFault signal appear as a pulse or remain continuously at LOW level?

2. when enable is asserted, the resulting nfault signal appears only as a brief low level pulse, right?

+1 Ryan Kehr 5 months ago in reply to Johnson David

TI__Guru 55595 points

1) After that initial pulse that occurs when the device is coming out of the sleep state, the nFAULT will follow conditions specified in the datasheet depending on the fault that is occurring. Some are latched faults in which the nFAULT will stay low and others will clear automatically per Table 6 in the datasheet.

2) Correct.

0 Johnson David 5 months ago in reply to Ryan Kehr

Prodigy 80 points

Thank you!

Have a wonderful end of the year!

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DRV8350: nfault problem