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DRV8262EVM: Overcurrent protection operating conditions

Part Number: DRV8262EVM

Tool/software:

Dear Team,

Our customer has purchased the DRV8262EVM evaluation board and is currently conducting evaluations.
We would appreciate your insights regarding the following inquiries:

When driving a brushed motor, is the DECAY pin strictly required to be set to SLOW DECAY MODE (logic low)?
Additionally, is it acceptable to connect the pin directly to GND to achieve a logic low input?

Upon reviewing the current waveform, we observed the phenomenon shown in the attached image.
Although the specification indicates support for peak currents up to 16A, it appears that overcurrent protection is being triggered around 10A.
Could you please advise on possible causes for this behavior?

*Green signal (CH4): IC OUT output current waveform

*Magenta (CH3): nFAULT signal

The current operating conditions are as follows:

VM: 40V
MODE0 / MODE1: 3.3V / Open
DECAY / OCPM / TOFF: 1kΩ pull-down
We look forward to your feedback.

Best regards,

  • Hi Okutsu-san,

    Thank you for your question.

    When driving a brushed motor, is the DECAY pin strictly required to be set to SLOW DECAY MODE (logic low)?
    Additionally, is it acceptable to connect the pin directly to GND to achieve a logic low input?

    Yes correct. For a BDC motor only SLOW DECAY must be used. The EVM GUI has a known issue - does not show SLOW DECAY option. So it is suggested to connect the DECAY pin directly to GND to ensure SLOW DECAY operation.

    Upon reviewing the current waveform, we observed the phenomenon shown in the attached image.
    Although the specification indicates support for peak currents up to 16A, it appears that overcurrent protection is being triggered around 10A.
    Could you please advise on possible causes for this behavior?

    According to the MODE1 and MODE2 mentioned in your post, the device is configured as Single H-Bridge in PWM control mode. Were the outputs connected in parallel? See below image. J22 and J24 shorts must be populated for outputs to operate in parallel. For parallel operation current regulation J19 must be populated. What was the VREF value set? When J19 is populated the RIPROPI in the EVM will become two 3.3 kΩ connected in parallel, 1.65 kΩ. With VREF = 3.3 V, the current regulation Itrip value would be 9.43 A.

    OCP current limit cannot be verified accurately with current regulation active. For testing OCP limit we recommend disabling current regulation temporarily by shorting J18 and J20 jumpers. After testing OCP these shorts can be removed to enable current regulation. 

    We also noticed in the EVM the ADC input was interfering with the IPROPI output and current regulation operation. To avoid this issue we recommend removing the two IPROPI jumpers marked with red rectangle in the header J4. 

    Any specific reason why TOFF also was pulled down? TOFF = 7 μs could increase the switching losses significantly compared to using TOFF of 16 or 24 μs, 16 μs setting TOFF = 1 would be a good middle ground. 

    Also you mentioned OCPM is pulled down. This means OCP response would be a latched and disabled outputs until an nSLEEP reset pulse is applied. Based on the waveform it seemed to have recovered immediately after a short spike. Was an nSLEEP reset pulse applied? If not this may not be an OCP response. Perhaps it was a thermal shutdown and recovery - this would be hard to access as thermal transients could happen so fast that measuring temperature with a thermal camera may not show it unless a faster frame rate camera is used. Thank you.  

    Regards, Murugavel 

  • Murugavel -san,

    Thank you for answering my question.

    Our customer also asked the following question:

    ・To test the OCP limit, we recommend shorting the jumpers at J18 and J20 to temporarily disable current control. After testing, remove the jumpers and re-enable current control.

    → Could you please let me know if this is clearly stated in the datasheet, application note, etc.?
    (In the past, there have been cases with other drivers where the current exceeded the limit and a FAULT signal was output.)

    VREF is directly connected to 3.3V, and RIpropi is connected to 1.5KΩ to allow 10A to flow. (R82 and the jumper have been removed, and the current is J19 short Left right arrow J18 short Left right arrow 1KΩ Left right arrow GND.)

    ・Regarding TOFF
    Could you please tell me what the advantages and disadvantages are of extending TOFF?
    - Currently, the motor enable is controlled by the nSleep pin, but is it possible to design it so that this is replaced with VREF and nSLEEP is pulled down? (Signal is 3.3V)

    Best Regards,

  • Hi Okutsu-san,

    Our customer also asked the following question:

    ・To test the OCP limit, we recommend shorting the jumpers at J18 and J20 to temporarily disable current control. After testing, remove the jumpers and re-enable current control.

    → Could you please let me know if this is clearly stated in the datasheet, application note, etc.?
    (In the past, there have been cases with other drivers where the current exceeded the limit and a FAULT signal was output.)

    This has nothing to do with the device. I mentioned this as a common circuit theory to isolate the influence of current regulation loop while testing the OCP limit. In real world applications the current regulation will be enabled and OCP will be detected if OC short happens while regulating current. Customer can test with and without current regulation enabled, no issues with this. For a pure OCP behavior knowledge they can disable current regulation. 

    ・Regarding TOFF
    Could you please tell me what the advantages and disadvantages are of extending TOFF?

    TOFF can be selected from one of the four available values. Smaller TOFF will increase the switching frequency hence switching losses. Smaller TOFF would also reduce the current ripple. Longer TOFF will reduce the switching frequency hence switching losses. With some motors longer TOFF can bring the switching frequency to the audible range in which case TOFF can be reduced for audible noise improvement. It can be selected based on VM voltage and motor L and R, BEMF characteristics.  

    - Currently, the motor enable is controlled by the nSleep pin, but is it possible to design it so that this is replaced with VREF and nSLEEP is pulled down? (Signal is 3.3V)

    The VREF MIN specification is 0.05 V. When the device is in sleep mode nSLEEP is pulled down VREF input does not matter. What is purpose of pulling down VREF while nSLEEP = 0? Thank you.

    Regards, Murugavel