Other Parts Discussed in Thread: DRV8834, DRV8801
Hi,
the motor will be driven in Full Step Sequence using DRV8836 in Phase/Enable Mode. The driving waveforms are shown in the datasheet of DRV8834 (page 24, Figure 14) where APHASE and BPHASE are two PWM square waves 90° shifted one respect to the other. In that same figure the two signals AENBL and BENBL are both high to enable driving. I suppose that brake will start whenever AENBL and BENBL are low. My questions are the following:
- is it correct to drive AENBL and BENBL with the same signal (High/Low for drive/brake) with transitions asynchronous with respect to APHASE and BPHASE? (the target is to minimize the number of signals from MSP430). In this case is there some drawback, e.g. brake could become out of control?
- Is it correct to suppose that PWM signals are only needed for APHASE and BPHASE signals while AENBL/BENBL can be tied to a GPIO without PWM funtionality? (the target is to minimize the number of used pins with PWM function in MSP430).
- In order to drive the motor in Full Step Sequence, the two PWM signals APHASE and BPHASE can be generated using TIMER_A in Up/Down mode with two different compare modules, TACCR1 and TACCR2. Is there a different TIMER_A configuration suitable to generate the two PWM signals (90° offset) while using a single compare module?
Thanks a lot.
Best regards,
Mauro